2024-11-20 12:54:09 +01:00
|
|
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\section{\staticdeps: static extraction of memory-carried dependencies}
|
2024-11-27 10:18:48 +01:00
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2024-11-29 13:32:50 +01:00
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|
\begin{frame}[fragile]{Dependencies, through registers}
|
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\begin{minipage}[c]{0.35\textwidth}
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\begin{lstlisting}[language={[x86masm]Assembler}, numbers=none]
|
2024-12-05 12:06:59 +01:00
|
|
|
0: mov (%rax), (§\alert{\reg{rcx}}§)
|
2024-11-29 13:32:50 +01:00
|
|
|
...
|
2024-12-05 12:06:59 +01:00
|
|
|
3: add (§\alert{\reg{rcx}}§), %rdx
|
2024-11-29 13:32:50 +01:00
|
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|
\end{lstlisting}
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|
|
\end{minipage}\hfill
|
|
|
|
\begin{minipage}[c]{0.5\textwidth}
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\begin{itemize}
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|
\item Track register writes
|
2024-12-07 21:10:57 +01:00
|
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|
\item Output dependency upon read
|
2024-11-29 13:32:50 +01:00
|
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\end{itemize}
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\end{minipage}
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\begin{center}
|
2024-12-05 12:06:59 +01:00
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0 $\to$ 3 through \reg{rcx}
|
2024-11-29 13:32:50 +01:00
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\end{center}
|
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\end{frame}
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\begin{frame}[fragile]{Dependencies, loop-carried}
|
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\begin{minipage}[c]{0.40\textwidth}
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|
\begin{lstlisting}[language={[x86masm]Assembler}, numbers=none]
|
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|
|
loop:
|
2024-12-06 11:54:46 +01:00
|
|
|
0: add (§\alert{\reg{rcx}}§), %rdx
|
2024-11-29 13:32:50 +01:00
|
|
|
...
|
2024-12-06 11:54:46 +01:00
|
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|
3: mov (%rax), (§\alert{\reg{rcx}}§)
|
2024-11-29 13:32:50 +01:00
|
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|
6: jmp loop
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|
\end{lstlisting}
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|
\end{minipage}\hfill
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\begin{minipage}[c]{0.1\textwidth}
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|
$\longrightarrow$
|
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|
\end{minipage}\hfill
|
|
|
|
\begin{minipage}[c]{0.40\textwidth}
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|
|
\begin{lstlisting}[language={[x86masm]Assembler}, numbers=none]
|
2024-12-05 12:06:59 +01:00
|
|
|
0: add %rcx, %rdx
|
|
|
|
...
|
|
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|
3: mov (%rax), (§\alert{\reg{rcx}}§)
|
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|
|
0: add (§\alert{\reg{rcx}}§), %rdx
|
|
|
|
...
|
|
|
|
3: mov (%rax), %rcx
|
2024-11-29 13:32:50 +01:00
|
|
|
\end{lstlisting}
|
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|
|
\end{minipage}
|
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|
|
|
|
\begin{center}
|
2024-12-05 12:06:59 +01:00
|
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|
3 $\to$ 0 through \reg{rcx}, \alert{loop-carried}
|
2024-11-29 13:32:50 +01:00
|
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|
\end{center}
|
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|
|
\end{frame}
|
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|
2024-12-01 15:32:24 +01:00
|
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|
\begin{frame}[fragile]{Dependencies, through memory}
|
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|
|
\begin{minipage}[c]{0.30\textwidth}
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|
|
\begin{lstlisting}[language={[x86masm]Assembler}, numbers=none]
|
2024-12-05 12:06:59 +01:00
|
|
|
mov %r10, (§\alert{4(\reg{rax})}§)
|
2024-12-01 15:32:24 +01:00
|
|
|
add $4, %rax
|
2024-12-05 12:06:59 +01:00
|
|
|
add (§\alert{(\reg{rax})}§), %rbx
|
2024-12-01 15:32:24 +01:00
|
|
|
\end{lstlisting}
|
|
|
|
\end{minipage}\hfill
|
|
|
|
\begin{minipage}[c]{0.68\textwidth}
|
|
|
|
\begin{itemize}
|
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|
|
\item Through memory: indirections, arithmetics, …
|
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|
|
\item Requires comparison of arbitrary symbolic expressions
|
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|
|
\medskip{}
|
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|
|
\item Use randomness as a kind of hash table instead
|
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|
\item Loop-carried: luckily, ROB is finite and small
|
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|
\end{itemize}
|
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|
\end{minipage}
|
2024-12-01 21:21:43 +01:00
|
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|
\pause{}
|
|
|
|
\bigskip
|
|
|
|
\begin{center}
|
|
|
|
\textbf{Hypothesis:} pointers from context \alert{do not
|
|
|
|
alias}.\\
|
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|
|
Compilers prefer passing a single pointer.
|
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|
\end{center}
|
2024-11-27 10:18:48 +01:00
|
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|
\end{frame}
|
|
|
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|
2024-11-29 13:32:50 +01:00
|
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|
|
2024-11-27 10:18:48 +01:00
|
|
|
\begin{frame}{The \staticdeps{} algorithm}
|
|
|
|
\begin{itemize}
|
|
|
|
\item \alert{Unroll} kernel until $\card{\kerK} \geq \card{\text{ROB}} +
|
|
|
|
\card{\kerK_0}$
|
|
|
|
\item \alert{Simulate} execution
|
|
|
|
\item Unknown value (reg./mem.)? \alert{Sample} uniformly in $0\ldots2^{64}-1$
|
|
|
|
(\alert{``fresh''})
|
|
|
|
\item \alert{Compute arithmetics} normally (overflow is fine)
|
|
|
|
\item Float or unknown operands $\leadsto \alert{\bot}$
|
|
|
|
\item Upon write, remember from which instruction
|
2024-12-07 21:10:57 +01:00
|
|
|
\item Upon read, if writer known, \alert{output dependency}
|
2024-11-27 10:18:48 +01:00
|
|
|
\end{itemize}
|
|
|
|
\end{frame}
|
|
|
|
|
|
|
|
\begin{frame}[fragile]{An example: memoized Fibonacci sequence}
|
2024-11-27 10:46:35 +01:00
|
|
|
\begin{minipage}[c]{0.46\textwidth}
|
2024-11-27 10:18:48 +01:00
|
|
|
\begin{lstlisting}[language=C]
|
|
|
|
int fibo(int* F, int n) {
|
|
|
|
for(int i=2; i <= n; ++i) {
|
|
|
|
F[i] = F[i-1] + F[i-2];
|
|
|
|
}
|
|
|
|
return F[n];
|
|
|
|
}
|
|
|
|
\end{lstlisting}
|
2024-11-27 10:46:35 +01:00
|
|
|
\end{minipage}\hfill\begin{minipage}[c]{0.06\textwidth}
|
|
|
|
\contour{black}{$\longrightarrow$}
|
|
|
|
\end{minipage}\hfill\begin{minipage}[c]{0.40\textwidth}
|
|
|
|
\begin{lstlisting}[language={[x86masm]Assembler}, numbers=none]
|
2024-11-27 10:18:48 +01:00
|
|
|
0: mov (%rax),%edx
|
|
|
|
1: add 0x4(%rax),%edx
|
|
|
|
2: mov %edx,0x8(%rax)
|
|
|
|
3: add $0x4,%rax
|
|
|
|
4: cmp %rcx,%rax
|
|
|
|
5: jne 0
|
|
|
|
\end{lstlisting}
|
|
|
|
\end{minipage}
|
|
|
|
\end{frame}
|
|
|
|
|
2024-11-27 10:46:35 +01:00
|
|
|
\begin{frame}[fragile]
|
|
|
|
\vspace{1cm}
|
2024-11-27 10:18:48 +01:00
|
|
|
\newcommand{\unk}{{\color{gray}?}}
|
|
|
|
\newcommand{\h}{\cellcolor[HTML]{D0ECFF}}
|
|
|
|
\newcommand{\w}{\cellcolor[HTML]{d6bf86}}
|
2024-12-05 12:06:59 +01:00
|
|
|
\newcommand{\dep}[1]{{\color{red}#1\,$\to$}}
|
2024-11-27 10:46:35 +01:00
|
|
|
\begin{columns}
|
|
|
|
\column{\dimexpr\paperwidth-8pt}
|
|
|
|
\centering
|
|
|
|
\hfill\begin{minipage}{0.29\textwidth}
|
|
|
|
{\footnotesize
|
|
|
|
\begin{tabular}{c c c}
|
|
|
|
Mem. read\h & & Mem. write\w \\
|
|
|
|
\end{tabular}
|
|
|
|
}
|
|
|
|
\vspace{1em}
|
|
|
|
\vfill
|
|
|
|
\begin{lstlisting}[language={[x86masm]Assembler}, numbers=none]
|
|
|
|
0: mov (%rax),%edx
|
|
|
|
1: add 0x4(%rax),%edx
|
|
|
|
2: mov %edx,0x8(%rax)
|
|
|
|
3: add $0x4,%rax
|
|
|
|
4: cmp %rcx,%rax
|
|
|
|
5: jne 0
|
|
|
|
\end{lstlisting}
|
|
|
|
\end{minipage}\hfill
|
|
|
|
\begin{minipage}{0.69\textwidth}
|
2024-11-27 10:18:48 +01:00
|
|
|
\centering
|
|
|
|
\footnotesize
|
2024-11-27 10:46:35 +01:00
|
|
|
\begin{tabular}{c c c c c c c c c l}
|
2024-11-27 10:18:48 +01:00
|
|
|
\toprule
|
2024-12-01 21:21:43 +01:00
|
|
|
\textbf{After} & \multicolumn{2}{c}{\textbf{Registers}} &&
|
2024-11-27 10:46:35 +01:00
|
|
|
\multicolumn{5}{c}{\textbf{Memory}} & \textbf{Dep}\\
|
|
|
|
\textbf{instr} & \reg{rax} & \reg{edx}
|
|
|
|
&& \texttt{100} & \texttt{104} & \texttt{108} & \texttt{112} & \texttt{116} & \\
|
|
|
|
\midrule
|
2024-12-01 21:21:43 +01:00
|
|
|
Start & \unk& \unk&& \unk & \unk & \unk & \unk & \unk & \\
|
|
|
|
\midrule
|
2024-11-27 10:46:35 +01:00
|
|
|
\pause{}
|
2024-12-05 12:06:59 +01:00
|
|
|
0 & 100 & 200 && 200\h& \unk & \unk & \unk & \unk & \\
|
2024-11-27 10:46:35 +01:00
|
|
|
\pause{}
|
2024-12-05 12:06:59 +01:00
|
|
|
1 & 100 & 376 && 200 & 176\h& \unk & \unk & \unk & \\
|
2024-11-27 10:46:35 +01:00
|
|
|
\pause{}
|
2024-12-05 12:06:59 +01:00
|
|
|
2 & 100 & 376 && 200 & 176 & 376\w& \unk & \unk & \\
|
2024-11-27 10:46:35 +01:00
|
|
|
\pause{}
|
2024-12-05 12:06:59 +01:00
|
|
|
3 & \alert{104} & 376 && 200 & 176 & 376 & \unk & \unk{} & \\{} % Oskour.
|
|
|
|
4 & 104 & 376 && 200 & 176 & 376 & \unk & \unk & \\
|
2024-11-27 10:18:48 +01:00
|
|
|
\midrule
|
2024-11-27 10:46:35 +01:00
|
|
|
\pause{}
|
2024-12-05 12:06:59 +01:00
|
|
|
0 & 104 & \alert{176} && 200 & 176\h& 376 & \unk & \unk & \\
|
2024-11-27 10:46:35 +01:00
|
|
|
\pause{}
|
2024-12-05 12:06:59 +01:00
|
|
|
1 & 104 & \alert{552} && 200 & 176 & 376\h& \unk & \unk & \dep{-1,2}\\
|
2024-11-27 10:46:35 +01:00
|
|
|
\pause{}
|
2024-12-05 12:06:59 +01:00
|
|
|
2 & 104 & 552 && 200 & 176 & 376 & 552\w& \unk & \\
|
2024-11-27 10:18:48 +01:00
|
|
|
\midrule
|
2024-11-27 10:46:35 +01:00
|
|
|
\pause{}
|
2024-12-05 12:06:59 +01:00
|
|
|
0 & 108 & \alert{376} && 200 & 176 & 376\h& 552 & \unk & \dep{-2,2}\\
|
2024-11-27 10:46:35 +01:00
|
|
|
\pause{}
|
2024-12-05 12:06:59 +01:00
|
|
|
1 & 108 & \alert{928} && 200 & 176 & 376 & 552\h& \unk & \dep{-1,2}\\
|
2024-11-27 10:46:35 +01:00
|
|
|
\pause{}
|
2024-12-05 12:06:59 +01:00
|
|
|
2 & 108 & 928 && 200 & 176 & 376 & 552 & 928\w &\\
|
2024-11-27 10:46:35 +01:00
|
|
|
\bottomrule{}
|
2024-11-27 10:18:48 +01:00
|
|
|
\end{tabular}
|
2024-11-27 10:46:35 +01:00
|
|
|
\end{minipage}\hfill
|
|
|
|
\end{columns}
|
2024-11-27 10:18:48 +01:00
|
|
|
\let\unk\unefined
|
|
|
|
\let\h\unefined
|
|
|
|
\let\w\unefined
|
2024-11-27 10:46:35 +01:00
|
|
|
\let\dep\unefined
|
|
|
|
|
|
|
|
\end{frame}
|
|
|
|
|
|
|
|
\begin{frame}{Practical implementation}
|
|
|
|
\begin{itemize}
|
|
|
|
\item Python code
|
|
|
|
\item Reads asm / elf / symbol in elf
|
|
|
|
\item Disassembly: \texttt{capstone}
|
|
|
|
\item Semantics: \texttt{VEX} (aka Valgrind)
|
|
|
|
\end{itemize}
|
|
|
|
|
|
|
|
\begin{center}
|
2024-12-01 14:03:37 +01:00
|
|
|
$\leadsto$ fast; supports many architectures
|
2024-11-27 10:46:35 +01:00
|
|
|
\end{center}
|
|
|
|
\end{frame}
|
|
|
|
|
|
|
|
\begin{frame}{Limitations}
|
|
|
|
\begin{itemize}
|
|
|
|
\item Randomness may generate false positives
|
|
|
|
\begin{itemize}
|
|
|
|
\item Very unlikely: $2^{64}$ vs. $\sim~10^{4}$
|
|
|
|
\item If needed, amplify (run twice)
|
|
|
|
\end{itemize}
|
|
|
|
\item No false negatives caused by randomness, however
|
|
|
|
|
|
|
|
\bigskip
|
|
|
|
\item Unaware of context: \emph{assumes no pointers alias}
|
|
|
|
\begin{itemize}
|
|
|
|
\item Intrinsic limitation of block-based code analyzers
|
2024-12-05 18:34:30 +01:00
|
|
|
\item Future works: information from
|
|
|
|
\begin{itemize}
|
|
|
|
\item the compiler?
|
|
|
|
\item a light instrumentation pass?
|
|
|
|
\end{itemize}
|
2024-11-27 10:46:35 +01:00
|
|
|
\end{itemize}
|
|
|
|
\end{itemize}
|
|
|
|
\end{frame}
|
|
|
|
|
|
|
|
\begin{frame}{Evaluation: coverage}
|
|
|
|
\begin{itemize}
|
|
|
|
\item Baseline: instrumentation (extract deps at runtime)
|
2024-12-06 12:48:21 +01:00
|
|
|
\item Filter \textit{long-distance dependencies} ($> \card{\text{ROB}}$)
|
2024-11-27 10:46:35 +01:00
|
|
|
\item On all \cesasme{} benchmarks
|
|
|
|
\end{itemize}
|
|
|
|
\begin{minipage}{0.4\textwidth}
|
|
|
|
\[
|
|
|
|
\cov_u =
|
|
|
|
\frac{\card{\text{found}}}{\card{\text{found}}+\card{\text{missed}}}
|
|
|
|
\]
|
|
|
|
\end{minipage}\hfill
|
|
|
|
\begin{minipage}{0.4\textwidth}
|
|
|
|
\[
|
|
|
|
\cov_w =
|
|
|
|
\frac{\sum_{d\in\text{found}}\rho_d}
|
|
|
|
{\sum_{d\in\text{found}~\cup~\text{missed}}\rho_d}
|
|
|
|
\]
|
|
|
|
\end{minipage}
|
|
|
|
|
|
|
|
\vfill
|
|
|
|
|
|
|
|
\begin{center}
|
|
|
|
\begin{tabular}{r r}
|
|
|
|
\toprule
|
|
|
|
$\cov_u$ (\%) & $\cov_w$ (\%) \\
|
|
|
|
\midrule
|
|
|
|
\alert{94.4} & \alert{98.3} \\
|
|
|
|
\bottomrule
|
|
|
|
\end{tabular}
|
|
|
|
\end{center}
|
2024-11-27 10:18:48 +01:00
|
|
|
\end{frame}
|
2024-11-28 18:50:44 +01:00
|
|
|
|
2024-12-06 12:48:21 +01:00
|
|
|
\begin{frame}{Evaluation: \textit{points-to} analysis}
|
|
|
|
\begin{itemize}
|
|
|
|
\item Quantify whether $\exists p, q \in \text{context}$ pointing to
|
|
|
|
the \alert{same memory region} (``points-to'')
|
|
|
|
\item Proxy: if $i_0 \to i_1$, then $q \in i_1$ aliases $p \in i_0$
|
|
|
|
\item If $p = q$, we should catch it
|
|
|
|
\item If not: either \emph{long-distance} with $p=q$, or \alert{$p \neq
|
|
|
|
q$}!
|
|
|
|
\item[$\leadsto$] Keep long-distance dependencies; evaluate coverage on this
|
|
|
|
\end{itemize}
|
|
|
|
\begin{center}
|
|
|
|
\begin{tabular}{r r}
|
|
|
|
\toprule
|
|
|
|
$\cov_u$ (\%) & $\cov_w$ (\%) \\
|
|
|
|
\midrule
|
|
|
|
\alert{95.0} & \alert{93.7} \\
|
|
|
|
\bottomrule
|
|
|
|
\end{tabular}
|
|
|
|
\end{center}
|
|
|
|
\end{frame}
|
|
|
|
|
2024-11-28 18:50:44 +01:00
|
|
|
\begin{frame}{Evaluation: use in \uica}
|
|
|
|
\begin{columns}
|
|
|
|
\column{\dimexpr\paperwidth-8pt}
|
|
|
|
\centering
|
2024-12-05 13:42:59 +01:00
|
|
|
\begin{minipage}[c]{0.5\textwidth}
|
2024-11-28 18:50:44 +01:00
|
|
|
\centering
|
|
|
|
\includegraphics[width=0.98\textwidth]{uica_sd_boxplot.svg}
|
|
|
|
\end{minipage}
|
|
|
|
\end{columns}
|
|
|
|
\end{frame}
|