2024-11-20 12:54:09 +01:00
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\section{\staticdeps: static extraction of memory-carried dependencies}
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2024-11-27 10:18:48 +01:00
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2024-11-29 13:32:50 +01:00
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\begin{frame}[fragile]{Dependencies, through registers}
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\begin{minipage}[c]{0.35\textwidth}
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\begin{lstlisting}[language={[x86masm]Assembler}, numbers=none]
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0: mov (%rax), %rcx
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...
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3: add %rcx, %rdx
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\end{lstlisting}
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\end{minipage}\hfill
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\begin{minipage}[c]{0.5\textwidth}
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\begin{itemize}
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\item Track register writes
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\item Generate dependency upon read
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\end{itemize}
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\end{minipage}
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\begin{center}
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3 $\rightarrow$ 0 through \reg{rcx}
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\end{center}
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\end{frame}
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\begin{frame}[fragile]{Dependencies, loop-carried}
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\begin{minipage}[c]{0.40\textwidth}
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\begin{lstlisting}[language={[x86masm]Assembler}, numbers=none]
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loop:
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0: add %rcx, %rdx
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...
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3: mov (%rax), %rcx
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6: jmp loop
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\end{lstlisting}
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\end{minipage}\hfill
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\begin{minipage}[c]{0.1\textwidth}
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$\longrightarrow$
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\end{minipage}\hfill
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\begin{minipage}[c]{0.40\textwidth}
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\begin{lstlisting}[language={[x86masm]Assembler}, numbers=none]
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0,0: add %rcx, %rdx
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...
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0,3: mov (%rax), %rcx
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1,0: add %rcx, %rdx
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...
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1,3: mov (%rax), %rcx
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\end{lstlisting}
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\end{minipage}
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\begin{center}
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2024-12-01 13:17:28 +01:00
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1,0 $\rightarrow$ 0,3 through \reg{rcx}\\
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\ie{} \alert{loop-carried 1 $\rightarrow$ 3}
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2024-11-29 13:32:50 +01:00
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\end{center}
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\end{frame}
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2024-12-01 15:32:24 +01:00
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\begin{frame}[fragile]{Dependencies, through memory}
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\begin{minipage}[c]{0.30\textwidth}
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\begin{lstlisting}[language={[x86masm]Assembler}, numbers=none]
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mov %r10, 4(%rax)
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add $4, %rax
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2024-12-01 22:39:43 +01:00
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add (%rax), %rbx
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2024-12-01 15:32:24 +01:00
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\end{lstlisting}
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\end{minipage}\hfill
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\begin{minipage}[c]{0.68\textwidth}
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\begin{itemize}
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\item Through memory: indirections, arithmetics, …
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\item Requires comparison of arbitrary symbolic expressions
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\medskip{}
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\item Use randomness as a kind of hash table instead
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\item Loop-carried: luckily, ROB is finite and small
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\end{itemize}
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\end{minipage}
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2024-12-01 21:21:43 +01:00
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\pause{}
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\bigskip
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\begin{center}
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\textbf{Hypothesis:} pointers from context \alert{do not
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alias}.\\
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Compilers prefer passing a single pointer.
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\end{center}
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2024-11-27 10:18:48 +01:00
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\end{frame}
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2024-11-29 13:32:50 +01:00
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2024-11-27 10:18:48 +01:00
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\begin{frame}{The \staticdeps{} algorithm}
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\begin{itemize}
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\item \alert{Unroll} kernel until $\card{\kerK} \geq \card{\text{ROB}} +
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\card{\kerK_0}$
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\item \alert{Simulate} execution
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\item Unknown value (reg./mem.)? \alert{Sample} uniformly in $0\ldots2^{64}-1$
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(\alert{``fresh''})
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\item \alert{Compute arithmetics} normally (overflow is fine)
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\item Float or unknown operands $\leadsto \alert{\bot}$
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\item Upon write, remember from which instruction
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\item Upon read, if writer known, \alert{generate dependency}
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\end{itemize}
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\end{frame}
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\begin{frame}[fragile]{An example: memoized Fibonacci sequence}
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2024-11-27 10:46:35 +01:00
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\begin{minipage}[c]{0.46\textwidth}
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2024-11-27 10:18:48 +01:00
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\begin{lstlisting}[language=C]
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int fibo(int* F, int n) {
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for(int i=2; i <= n; ++i) {
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F[i] = F[i-1] + F[i-2];
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}
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return F[n];
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}
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\end{lstlisting}
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2024-11-27 10:46:35 +01:00
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\end{minipage}\hfill\begin{minipage}[c]{0.06\textwidth}
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\contour{black}{$\longrightarrow$}
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\end{minipage}\hfill\begin{minipage}[c]{0.40\textwidth}
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\begin{lstlisting}[language={[x86masm]Assembler}, numbers=none]
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2024-11-27 10:18:48 +01:00
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0: mov (%rax),%edx
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1: add 0x4(%rax),%edx
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2: mov %edx,0x8(%rax)
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3: add $0x4,%rax
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4: cmp %rcx,%rax
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5: jne 0
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\end{lstlisting}
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\end{minipage}
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\end{frame}
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2024-11-27 10:46:35 +01:00
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\begin{frame}[fragile]
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\vspace{1cm}
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2024-11-27 10:18:48 +01:00
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\newcommand{\unk}{{\color{gray}?}}
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\newcommand{\h}{\cellcolor[HTML]{D0ECFF}}
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\newcommand{\w}{\cellcolor[HTML]{d6bf86}}
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2024-11-27 10:46:35 +01:00
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\newcommand{\dep}[1]{{\color{red}$\veryshortarrow$\,#1}}
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\begin{columns}
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\column{\dimexpr\paperwidth-8pt}
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\centering
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\hfill\begin{minipage}{0.29\textwidth}
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{\footnotesize
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\begin{tabular}{c c c}
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Mem. read\h & & Mem. write\w \\
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\end{tabular}
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}
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\vspace{1em}
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\vfill
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\begin{lstlisting}[language={[x86masm]Assembler}, numbers=none]
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0: mov (%rax),%edx
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1: add 0x4(%rax),%edx
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2: mov %edx,0x8(%rax)
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3: add $0x4,%rax
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4: cmp %rcx,%rax
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5: jne 0
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\end{lstlisting}
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\end{minipage}\hfill
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\begin{minipage}{0.69\textwidth}
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2024-11-27 10:18:48 +01:00
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\centering
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\footnotesize
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2024-11-27 10:46:35 +01:00
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\begin{tabular}{c c c c c c c c c l}
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2024-11-27 10:18:48 +01:00
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\toprule
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2024-12-01 21:21:43 +01:00
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\textbf{After} & \multicolumn{2}{c}{\textbf{Registers}} &&
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2024-11-27 10:46:35 +01:00
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\multicolumn{5}{c}{\textbf{Memory}} & \textbf{Dep}\\
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\textbf{instr} & \reg{rax} & \reg{edx}
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&& \texttt{100} & \texttt{104} & \texttt{108} & \texttt{112} & \texttt{116} & \\
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\midrule
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2024-12-01 21:21:43 +01:00
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Start & \unk& \unk&& \unk & \unk & \unk & \unk & \unk & \\
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\midrule
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2024-11-27 10:46:35 +01:00
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\pause{}
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2024-12-01 21:21:43 +01:00
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0,0 & 100 & 200 && 200\h& \unk & \unk & \unk & \unk & \\
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2024-11-27 10:46:35 +01:00
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\pause{}
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2024-12-01 21:21:43 +01:00
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0,1 & 100 & 376 && 200 & 176\h& \unk & \unk & \unk & \\
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2024-11-27 10:46:35 +01:00
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\pause{}
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2024-12-01 21:21:43 +01:00
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0,2 & 100 & 376 && 200 & 176 & 376\w& \unk & \unk & \\
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2024-11-27 10:46:35 +01:00
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\pause{}
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2024-12-01 21:21:43 +01:00
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0,3 & \alert{104} & 376 && 200 & 176 & 376 & \unk & \unk & \\
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2024-12-04 09:51:53 +01:00
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0,4 & 104 & 376 && 200 & 176 & 376 & \unk & \unk & \\
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2024-11-27 10:18:48 +01:00
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\midrule
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2024-11-27 10:46:35 +01:00
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\pause{}
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2024-12-01 21:21:43 +01:00
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1,0 & 104 & \alert{176} && 200 & 176\h& 376 & \unk & \unk & \\
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2024-11-27 10:46:35 +01:00
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\pause{}
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2024-12-01 21:21:43 +01:00
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1,1 & 104 & \alert{552} && 200 & 176 & 376\h& \unk & \unk & \dep{-1,2}\\
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2024-11-27 10:46:35 +01:00
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\pause{}
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2024-12-01 21:21:43 +01:00
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1,2 & 104 & 552 && 200 & 176 & 376 & 552\w& \unk & \\
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2024-11-27 10:18:48 +01:00
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\midrule
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2024-11-27 10:46:35 +01:00
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\pause{}
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2024-12-01 21:21:43 +01:00
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2,0 & 108 & \alert{376} && 200 & 176 & 376\h& 552 & \unk & \dep{-2,2}\\
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2024-11-27 10:46:35 +01:00
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\pause{}
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2024-12-01 21:21:43 +01:00
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2,1 & 108 & \alert{928} && 200 & 176 & 376 & 552\h& \unk & \dep{-1,2}\\
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2024-11-27 10:46:35 +01:00
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\pause{}
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2024-12-01 21:21:43 +01:00
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2,2 & 108 & 928 && 200 & 176 & 376 & 552 & 928\w &\\
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2024-11-27 10:46:35 +01:00
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\bottomrule{}
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2024-11-27 10:18:48 +01:00
|
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\end{tabular}
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2024-11-27 10:46:35 +01:00
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\end{minipage}\hfill
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\end{columns}
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2024-11-27 10:18:48 +01:00
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\let\unk\unefined
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\let\h\unefined
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\let\w\unefined
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2024-11-27 10:46:35 +01:00
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\let\dep\unefined
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\end{frame}
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\begin{frame}{Practical implementation}
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\begin{itemize}
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\item Python code
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\item Reads asm / elf / symbol in elf
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\item Disassembly: \texttt{capstone}
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\item Semantics: \texttt{VEX} (aka Valgrind)
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\end{itemize}
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\begin{center}
|
2024-12-01 14:03:37 +01:00
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$\leadsto$ fast; supports many architectures
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2024-11-27 10:46:35 +01:00
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\end{center}
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\end{frame}
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\begin{frame}{Limitations}
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\begin{itemize}
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\item Randomness may generate false positives
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\begin{itemize}
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\item Very unlikely: $2^{64}$ vs. $\sim~10^{4}$
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\item If needed, amplify (run twice)
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\end{itemize}
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\item No false negatives caused by randomness, however
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\bigskip
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\item Unaware of context: \emph{assumes no pointers alias}
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\begin{itemize}
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\item Intrinsic limitation of block-based code analyzers
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\item Future works: abstract interpretation?
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\end{itemize}
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\end{itemize}
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\end{frame}
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\begin{frame}{Evaluation: coverage}
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\begin{itemize}
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\item Baseline: instrumentation (extract deps at runtime)
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\item On all \cesasme{} benchmarks
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\end{itemize}
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\begin{minipage}{0.4\textwidth}
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\[
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\cov_u =
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\frac{\card{\text{found}}}{\card{\text{found}}+\card{\text{missed}}}
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\]
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\end{minipage}\hfill
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\begin{minipage}{0.4\textwidth}
|
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|
|
\[
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\cov_w =
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\frac{\sum_{d\in\text{found}}\rho_d}
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{\sum_{d\in\text{found}~\cup~\text{missed}}\rho_d}
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\]
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\end{minipage}
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\vfill
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\begin{center}
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\begin{tabular}{r r}
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\toprule
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$\cov_u$ (\%) & $\cov_w$ (\%) \\
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\midrule
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\alert{94.4} & \alert{98.3} \\
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\bottomrule
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\end{tabular}
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\end{center}
|
2024-11-27 10:18:48 +01:00
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\end{frame}
|
2024-11-28 18:50:44 +01:00
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|
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\begin{frame}{Evaluation: use in \uica}
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|
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|
\begin{columns}
|
|
|
|
\column{\dimexpr\paperwidth-8pt}
|
|
|
|
\centering
|
|
|
|
\begin{minipage}[c]{0.57\textwidth}
|
|
|
|
\centering
|
|
|
|
\footnotesize
|
|
|
|
\begin{tabular}{l l r r r r}
|
|
|
|
\toprule
|
|
|
|
\textbf{Dataset} & \textbf{Bencher} & \textbf{MAPE} & \textbf{Median} & \textbf{$K_\tau$}\\
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&& (\%) & (\%) & \\
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|
|
\midrule
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|
|
\multirow{2}{*}{Full} & \uica{} & 29.59 & 18.26 & 0.58\\
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& + \staticdeps{} & 19.15 & 14.44 & 0.81\\
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|
|
\midrule
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|
\multirow{2}{*}{Pruned} & \uica{} & 18.42 & 11.96 & 0.80\\
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& + \staticdeps{} & 18.77 & 12.18 & 0.80\\
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|
\bottomrule
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|
|
|
\end{tabular}
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|
|
\end{minipage}
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|
\hfill
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|
|
|
\begin{minipage}[c]{0.4\textwidth}
|
|
|
|
\centering
|
|
|
|
\includegraphics[width=0.98\textwidth]{uica_sd_boxplot.svg}
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|
|
\end{minipage}
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|
|
\end{columns}
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|
\end{frame}
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