286 lines
13 KiB
BibTeX
286 lines
13 KiB
BibTeX
@phdthesis{phd:gruber,
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url = "http://www.theses.fr/2019GREAM071",
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title = "Performance Debugging Toolbox for Binaries: Sensitivity Analysis and Dependence Profiling",
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author = "Gruber, Fabian",
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school = "Université Grenoble Alpes",
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year = "2019",
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note = "2019GREAM071",
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url = "http://www.theses.fr/2019GREAM071/document",
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}
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@article{kendalltau,
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title={A new measure of rank correlation},
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author={Kendall, Maurice G},
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journal={Biometrika},
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volume={30},
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number={1/2},
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pages={81--93},
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year={1938},
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publisher={JSTOR}
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}
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@manual{ref:amd_zen4_optim_manual,
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title={Software Optimization Guide for the AMD Zen4 Microarchitecture},
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organization = {Advanced Micro Devices (AMD)},
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year = {2023},
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month = {January},
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note = {Publication number 57647},
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}
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@manual{ref:intel64_architectures_optim_reference_vol1,
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title = {Intel® 64 and IA-32 Architectures Optimization Reference Manual
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Volume 1},
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organization = {Intel Corporation},
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year = {2023},
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month = {September},
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}
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@manual{ref:intel64_software_dev_reference_vol1,
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title = {Intel® 64 and IA-32 Architectures Software Developer’s Manual,
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volume 1},
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organization = {Intel Corporation},
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year = {2023},
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month = {June},
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}
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@manual{ref:amd64_architecture_dev_reference_vol2,
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title = {AMD64 Architecture Programmer’s Manual, volume 2},
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organization = {AMD},
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year = {2023},
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month = {June},
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}
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@incollection{grid5000,
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title = {Adding Virtualization Capabilities to the {Grid'5000} Testbed},
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author = {Balouek, Daniel and Carpen Amarie, Alexandra and Charrier, Ghislain and Desprez, Fr{\'e}d{\'e}ric and Jeannot, Emmanuel and Jeanvoine, Emmanuel and L{\`e}bre, Adrien and Margery, David and Niclausse, Nicolas and Nussbaum, Lucas and Richard, Olivier and P{\'e}rez, Christian and Quesnel, Flavien and Rohr, Cyril and Sarzyniec, Luc},
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booktitle = {Cloud Computing and Services Science},
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publisher = {Springer International Publishing},
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pages = {3-20},
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volume = {367},
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editor = {Ivanov, Ivan I. and van Sinderen, Marten and Leymann, Frank and Shan, Tony },
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series = {Communications in Computer and Information Science },
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isbn = {978-3-319-04518-4 },
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doi = {10.1007/978-3-319-04519-1\_1 },
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year = {2013},
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}
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@article{hcluster_ward,
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ISSN = {01621459},
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URL = {http://www.jstor.org/stable/2282967},
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abstract = {A procedure for forming hierarchical groups of mutually exclusive subsets, each of which has members that are maximally similar with respect to specified characteristics, is suggested for use in large-scale ($n > 100$) studies when a precise optimal solution for a specified number of groups is not practical. Given n sets, this procedure permits their reduction to n - 1 mutually exclusive sets by considering the union of all possible n(n - 1)/2 pairs and selecting a union having a maximal value for the functional relation, or objective function, that reflects the criterion chosen by the investigator. By repeating this process until only one group remains, the complete hierarchical structure and a quantitative estimate of the loss associated with each stage in the grouping can be obtained. A general flowchart helpful in computer programming and a numerical example are included.},
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author = {Joe H. Ward},
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journal = {Journal of the American Statistical Association},
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number = {301},
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pages = {236--244},
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publisher = {[American Statistical Association, Taylor & Francis, Ltd.]},
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title = {Hierarchical Grouping to Optimize an Objective Function},
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urldate = {2023-09-15},
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volume = {58},
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year = {1963}
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}
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@article{hcluster_silhouette,
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title = {Silhouettes: A graphical aid to the interpretation and validation of cluster analysis},
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journal = {Journal of Computational and Applied Mathematics},
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volume = {20},
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pages = {53-65},
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year = {1987},
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issn = {0377-0427},
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doi = {https://doi.org/10.1016/0377-0427(87)90125-7},
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url = {https://www.sciencedirect.com/science/article/pii/0377042787901257},
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author = {Peter J. Rousseeuw},
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keywords = {Graphical display, cluster analysis, clustering validity, classification},
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abstract = {A new graphical display is proposed for partitioning techniques. Each cluster is represented by a so-called silhouette, which is based on the comparison of its tightness and separation. This silhouette shows which objects lie well within their cluster, and which ones are merely somewhere in between clusters. The entire clustering is displayed by combining the silhouettes into a single plot, allowing an appreciation of the relative quality of the clusters and an overview of the data configuration. The average silhouette width provides an evaluation of clustering validity, and might be used to select an ‘appropriate’ number of clusters.}
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}
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@misc{a72_doc,
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title={Cortex A-72},
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author={{ARM}},
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howpublished={\url{https://developer.arm.com/Processors/Cortex-A72}}
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}
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@manual{ref:a72_optim,
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title = {Cortex-A72 Software Optimization Guide},
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organization = {ARM},
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year = {2015},
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month = {March},
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}
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@misc{agnerfog_skl_front4,
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title={Discussion on blogpost},
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author={Fog, Agner},
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year=2016,
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howpublished={\url{https://www.agner.org/optimize/blog/read.php?i=581}}
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}
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@INPROCEEDINGS{fugaku_arm,
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author={Matsuoka, Satoshi},
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booktitle={2021 Symposium on VLSI Circuits},
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title={Fugaku and A64FX: the First Exascale Supercomputer and its Innovative Arm CPU},
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year={2021},
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volume={},
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number={},
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pages={1-3},
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doi={10.23919/VLSICircuits52068.2021.9492415}
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}
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@misc{fugaku_top500,
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title={Supercomputer Fugaku retains first place worldwide in HPCG and Graph500 rankings},
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year=2023,
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month=05,
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author={{Fujitsu Limited}},
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howpublished={\url{https://www.fujitsu.com/global/about/resources/news/press-releases/2022/1115-01.html}}
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}
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@misc{marenostrum4_arm,
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title={Technical information on the MareNostrum 4 supercomputer's ARM cluster},
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author={{Barcelona Supercomputing Center}},
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year=2020,
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howpublished={\url{https://www.bsc.es/innovation-and-services/technical-information-cte-arm}}
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}
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@misc{arm_mobile,
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title={Together, we are building the future of computing, on Arm},
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author={Rene Haas},
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organization = {ARM},
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year=2023,
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month=September,
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howpublished={\url{https://www.arm.com/company/news/2023/09/building-the-future-of-computing-on-arm}},
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}
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@misc{wikichip_intel_rob_size,
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title={Intel Details Golden Cove: Next-Generation Big Core For Client and Server SoCs},
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author={{WikiChip}},
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year=2021,
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month=08,
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howpublished={\url{https://fuse.wikichip.org/news/6111/intel-details-golden-cove-next-generation-big-core-for-client-and-server-socs/}}
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}
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@misc{rowmajor_repo,
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title={Rowmajor vs. colmajor experiments},
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author={Bastian, Théophile},
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year=2023,
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month=10,
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howpublished={\url{https://gitlab.inria.fr/tbastian/rowmajor-measure}},
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}
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@misc{dgemm_finetune,
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title={High Performance Code Generation in MLIR: An Early Case Study
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with GEMM},
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author={Uday Bondhugula},
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year={2020},
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eprint={2003.00532},
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archivePrefix={arXiv},
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primaryClass={cs.PF}
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}
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@misc{elf_tis,
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title={Tool interface standard (TIS) executable and linking format (ELF) specification version 1.2},
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author={{TIS} Committee and others},
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year={1995},
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publisher={May}
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}
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@article{riscv_isa,
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title={The risc-v instruction set manual, volume i: Base user-level isa},
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author={Waterman, Andrew and Lee, Yunsup and Patterson, David A and Asanovic, Krste},
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journal={EECS Department, UC Berkeley, Tech. Rep. UCB/EECS-2011-62},
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volume={116},
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pages={1--32},
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year={2011}
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}
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@inproceedings{filippo_riscv_vector,
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title={Software Development Vehicles to enable extended and early co-design: a RISC-V and HPC case of study},
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author={Mantovani, Filippo and Vizcaino, Pablo and Banchelli, Fabio and Garcia-Gasulla, Marta and Ferrer, Roger and Ieronymakis, Georgios and Dimou, Nikolaos and Papaefstathiou, Vassilis and Labarta, Jesus},
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booktitle={International Conference on High Performance Computing},
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pages={526--537},
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year={2023},
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organization={Springer}
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}
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@misc{filippo_acaces23,
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author={Mantovani, Filippo},
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year={2023},
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month={July},
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howpublished={Private communication during the ACACES summer school},
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}
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@inproceedings{dead_uops,
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author={Ren, Xida and Moody, Logan and Taram, Mohammadkazem and Jordan, Matthew and Tullsen, Dean M. and Venkat, Ashish},
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booktitle={2021 ACM/IEEE 48th Annual International Symposium on Computer Architecture (ISCA)},
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title={I See Dead µops: Leaking Secrets via Intel/AMD Micro-Op Caches},
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year={2021},
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volume={},
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number={},
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pages={361-374},
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keywords={Program processors;Microarchitecture;Computer architecture;Timing;System-on-chip;Transient analysis},
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doi={10.1109/ISCA52012.2021.00036}}
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@article{Vishnekov_2021,
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doi = {10.1088/1742-6596/1740/1/012053},
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url = {https://dx.doi.org/10.1088/1742-6596/1740/1/012053},
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year = {2021},
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month = {jan},
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publisher = {IOP Publishing},
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volume = {1740},
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number = {1},
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pages = {012053},
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author = {A V Vishnekov and E M Ivanova and N A Stepanov and N D Shaimov},
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title = {A Simulation Model for Macro- and Micro-Fusion Algorithms in the CPU Core},
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journal = {Journal of Physics: Conference Series},
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abstract = {The article discusses the features of modern processor’s microarchitecture, the method of instruction’s and micro-operation’s accelerated execution. The research focuses on the organization of the decoding stage in the CPU core pipeline and Macro- and Micro-fusion algorithms. The Macro- and Micro-fusion mechanisms are defined. A computer simulator has been developed to explore these mechanisms. The developed software has a user-friendly interface, is easy to use, and combines training and research options. The computer simulator demonstrates the sequence of mechanism’ s implementation; the resulting macro-or microoperations set after Macro- and Micro-fusion, and also reflects each algorithm features for different processor’s families. The software allows you to use either a pre-prepared file with Assembler (x86) code fragments as source data, or enter/change the source code fragments at your request. The main combinations of machine instructions that can be fused into a single macro-operation are considered, as well as instructions that can be decoded into fused micro-operations. The simulator can be useful both for in Computer Science & Engineering students, especially for on-line education and for researchers and General-purpose CPU cores developers.}
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}
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@inproceedings{branch_pred_penalty,
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author={Eyerman, S. and Smith, J.E. and Eeckhout, L.},
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booktitle={2006 IEEE International Symposium on Performance Analysis of Systems and Software},
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title={Characterizing the branch misprediction penalty},
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year={2006},
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volume={},
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number={},
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pages={48-58},
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keywords={Pipelines;Delay;Performance analysis;Impedance;Length measurement;Clocks;Analytical models;Time measurement;Data analysis},
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doi={10.1109/ISPASS.2006.1620789}}
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@misc{hardware_loops_patent,
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title={Hardware loops},
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author={Singh, Ravi P and Roth, Charles P and Overkamp, Gregory A},
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year={2004},
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month=jun # "~8",
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note={US Patent 6,748,523}
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}
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@misc{kavvadias2007hardware,
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title={Hardware looping unit},
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author={Kavvadias, Nikolaos},
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year={2007}
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}
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@inproceedings{talla2001hwloops,
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author={Talla, D. and John, L.K.},
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booktitle={Proceedings 2001 IEEE International Conference on Computer Design: VLSI in Computers and Processors. ICCD 2001},
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title={Cost-effective hardware acceleration of multimedia applications},
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year={2001},
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volume={},
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number={},
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pages={415-424},
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keywords={Hardware;Acceleration;Computer aided instruction;Streaming media;Parallel processing;Throughput;Concurrent computing;Application software;Microprocessors;Feeds},
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doi={10.1109/ICCD.2001.955060}}
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@article{points_to,
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author = {Emami, Maryam and Ghiya, Rakesh and Hendren, Laurie J.},
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title = {Context-sensitive interprocedural points-to analysis in the presence of function pointers},
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year = {1994},
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issue_date = {June 1994},
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publisher = {Association for Computing Machinery},
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address = {New York, NY, USA},
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volume = {29},
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number = {6},
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issn = {0362-1340},
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url = {https://doi.org/10.1145/773473.178264},
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doi = {10.1145/773473.178264},
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abstract = {This paper reports on the design, implementation, and empirical results of a new method for dealing with the aliasing problem in C. The method is based on approximating the points-to relationships between accessible stack locations, and can be used to generate alias pairs, or used directly for other analyses and transformations.Our method provides context-sensitive interprocedural information based on analysis over invocation graphs that capture all calling contexts including recursive and mutually-recursive calling contexts. Furthermore, the method allows the smooth integration for handling general function pointers in C.We illustrate the effectiveness of the method with empirical results from an implementation in the McCAT optimizing/parallelizing C compiler.},
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journal = {SIGPLAN Not.},
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month = {jun},
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pages = {242–256},
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numpages = {15}
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}
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