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Frontend: WIP intro writeup

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Théophile Bastian 2024-04-10 17:38:36 +02:00
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7
manuscrit/40_A72-frontend/00_intro.tex
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@ -37,4 +37,9 @@ very few hardware counters. However, it yielded only mixed results, as shown in
In this chapter, we show that a major cause of imprecision in these results is
the absence of a frontend model. We manually model the Cortex A72 frontend to
compare a raw \palmed{}-generated model, to one naively augmented with a
frontend model. \todo{discuss automated future work}
frontend model.
While this chapter only documents a manual approach, we view it as a
preliminary work towards an automation of the synthesis of a model that stems
from benchmarks data, in the same way that \palmed{} synthesises a backend
model.

17
manuscrit/40_A72-frontend/30_manual_frontend.tex
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@ -2,7 +2,8 @@
\todo{}
\subsection{Finding micro-operation count for each instruction}
\subsection{Finding micro-operation count for each
instruction}\label{ssec:a72_insn_muop_count}
As we saw in \autoref{sec:a72_descr}, the Cortex A72's frontend can only
dispatch three \uops{} per cycle. The first important data to collect, thus, is
@ -523,4 +524,16 @@ than \llvmmca{} on the Cortex A72.
\section{Future works: benchmark-based automatic frontend model generation}
\todo{}
While this chapter was solely centered on the Cortex A72, we believe that this
study paves the way for an automated frontend model synthesis akin to
\palmed{}. This synthesis should be fully-automated; stem solely from
benchmarking data and a description of the ISA; and should avoid the use of any
specific hardware counter.
The core of the model presented in this chapter is the discovery, for each
instruction, of its \uop{} count. Assuming that a model of the backend is known
--~by taking for instance a model generated by \palmed{} or \uopsinfo{}~--, the
method described in \autoref{ssec:a72_insn_muop_count} should be generic enough
to be used on any processor. The basic instructions may be easily selected
using the backend model --~we assume their existence in most
microarchitectures, as pragmatic concerns guide the ports design. \todo