111 lines
3.7 KiB
TeX
111 lines
3.7 KiB
TeX
\section*{A frontend model for the Cortex A72}
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%\begin{frame}{The Cortex A72}
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% \begin{itemize}
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% \item{} ARM
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% \item{} CPU of the Raspberry Pi 4: easily available
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% \medskip{}
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% \item{} ARM CPUs not usually modeled!
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% \item{} Backend modeled by \palmed{}
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% \end{itemize}
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%\end{frame}
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\begin{frame}{A72 pipeline}
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\centering
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\includegraphics[width=0.9\textwidth]{A72_pipeline_diagram.svg}
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\end{frame}
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%\begin{frame}{Manual model}
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% \begin{itemize}
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% \item Goal: manually craft a frontend model
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% \item Try to follow methods that can be automated
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% \item Propose a parametric model for future works, leaving question
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% marks on some sections
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% \end{itemize}
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%\end{frame}
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\begin{frame}{Proposed parametric model}
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\vfill
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\centering
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\begin{minipage}[t][0.7\textheight][c]{0.53\textwidth}
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\centering
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Globally,
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\vfill
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\includegraphics[width=\textwidth]{parametric_model-frontend.svg}
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\vfill~ % I hate LaTeX
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\end{minipage}
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\hfill\vrule\hfill
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\begin{minipage}[t][0.7\textheight][c]{0.43\textwidth}
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\centering
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For each instruction,
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\vfill
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\includegraphics[width=\textwidth]{parametric_model-insn.svg}
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\vfill~
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\end{minipage}
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\vfill
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In {\color{red}\textbf{red}}, parameters of the model.
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\end{frame}
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\begin{frame}{Counting \uops{}}
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For an instruction $i$, denote \alert{$\mucount{i}$} its number of \uops{}.
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\begin{itemize}
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\item{} For $k \in \nat$, construct (if possible) $\kerK_k$ a kernel:
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\begin{itemize}
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\item instruction $i$ + $k$ ``simple'' instructions (one \uop)
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\item frontend-bound:
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\[
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\cyc{\kerK_k} = \dfrac{k + \mucount{i}}{3}
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\]
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\end{itemize}
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\item{} For well-chosen $k_0$, we should have
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\[
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\cyc{\kerK_{k_0}} + \sfrac{1}{3} = \cyc{\kerK_{k_0+1}}
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\]
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\item{} Measure to verify
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\bigskip
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\item{} If so, \textbf{\[
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\mucount{i} = 3 \cyc{\kerK_{k_0}} - k_0
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\]}
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\end{itemize}
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\end{frame}
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\begin{frame}{Evaluation: comparison to bare \palmed}
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\begin{itemize}
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\item Add a frontend to \palmed{}:
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\[
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\cyc{\kerK}_{\text{pred.}} = \max(\texttt{palmed}(\kerK), \texttt{frontend}(\kerK))
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\]
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\item Reuse evaluation suite of \palmed{}: SPEC CPU 2017 + Polybench
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\item Compare to \llvmmca{}
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\end{itemize}
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\end{frame}
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\begin{frame}{Results}
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\centering
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\begin{tabular}{l l c r r r r r}
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\toprule
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& & & \multirow{2}{*}{\llvmmca{}} & \multicolumn{3}{c}{\palmed{} with
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frontend\ldots} \\
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& & & & none & linear & disp.\ queues \\
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\midrule{}
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\multirow{3}{*}{SPEC} & Cov. & (\%) & 100.00 & \na{} & 97.21 & 97.16 \\
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& Err. & (\%) & 9.0 & 20.1 & 6.2 & 4.6 \\
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& $\ktau$ & (1)& 0.83 & 0.88 & 0.91 & 0.93 \\
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\midrule
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\multirow{3}{*}{Polybench} & Cov. & (\%) & 100.00& \na{} & 99.33 & 99.33 \\
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& Err. & (\%) & 13.9 & 12.6 & 8.1 & 8.0 \\
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& $\ktau$ & (1)& 0.47 & 0.82 & 0.88 & 0.90 \\
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\bottomrule
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\end{tabular}
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\end{frame}
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%\begin{frame}{Limitations}
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% \begin{itemize}
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% \item Parts of this model were entirely manually solved (\eg{} \# of
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% dispatch queues)
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% \item Evaluation based on \palmed{} suite: biased
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% \item Must be tested on other architectures!
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% \end{itemize}
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%\end{frame}
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