phd-defense/slides/60_a72combined/main.tex
2024-12-05 17:56:09 +01:00

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\section[Wrapping up:\\the \acombined{} model]{Wrapping up: the \acombined{} model}
\begin{frame}
\centering
\only<1>{\includegraphics[height=0.8\textheight]{end_potato_nolat.svg}}
\only<2->{\includegraphics[height=0.8\textheight]{end_potato.svg}}\\
\vfill
\onslide<3->{\textbf{\alert{\Large$\leadsto$ Let's make a model for the Cortex A72!}}}
\end{frame}
\begin{frame}{From dependencies to cycles}
\begin{itemize}
\item \staticdeps{}: set to also report \alert{register} dependencies.
\item Unroll $\kerK$ to fill the ROB
\item Build \alert{dependencies graph}: edges are dependencies,
weighted by \alert{source instruction latency} (given by \palmed).
\item Compute \alert{longest path}, divide by repetitions of $\kerK$
\end{itemize}
\begin{center}
\textbf{$\leadsto$ lower bound on execution time}
\end{center}
\vfill
\begin{center}
\textbf{Combine frontend, backend, critical by taking the max}
\end{center}
\end{frame}
\begin{frame}
\begin{columns}
\column{\dimexpr\paperwidth-8pt}
\centering
\begin{minipage}[c]{0.40\textwidth}
\centering
\includegraphics[width=\textwidth]{cesasme_a72combined_boxplot.svg}
\end{minipage}
\end{columns}
\end{frame}