107 lines
3.1 KiB
BibTeX
107 lines
3.1 KiB
BibTeX
@article{pratt1995fdiv,
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title={Anatomy of the Pentium bug},
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author={Pratt, Vaughan},
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journal={TAPSOFT'95: Theory and Practice of Software Development},
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pages={97--107},
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year={1995},
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publisher={Springer}
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}
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@online{nicely_fdiv,
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author = {Thomas Nicely},
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title={Pentium FDIV flaw FAQ},
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year = {2011},
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url = {http://www.trnicely.net/pentbug/pentbug.html},
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urldate = {2017-08-10}
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}
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@inproceedings{harrison2003formal,
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title={Formal verification at intel},
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author={Harrison, John},
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booktitle={Logic in Computer Science, 2003. Proceedings. 18th Annual IEEE Symposium on},
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pages={45--54},
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year={2003},
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organization={IEEE}
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}
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@inproceedings{babai2016graph,
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title={Graph isomorphism in quasipolynomial time},
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author={Babai, L{\'a}szl{\'o}},
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booktitle={Proceedings of the 48th Annual ACM SIGACT Symposium on Theory of Computing},
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pages={684--697},
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year={2016},
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organization={ACM}
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}
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@inproceedings{cook1971complexity,
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title={The complexity of theorem-proving procedures},
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author={Cook, Stephen A},
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booktitle={Proceedings of the third annual ACM symposium on Theory of computing},
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pages={151--158},
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year={1971},
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organization={ACM}
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}
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@article{seger2005industrially,
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title={An industrially effective environment for formal hardware verification},
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author={Seger, C-JH and Jones, Robert B and O'Leary, John W and Melham, Tom and Aagaard, Mark D and Barrett, Clark and Syme, Don},
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journal={IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems},
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volume={24},
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number={9},
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pages={1381--1405},
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year={2005},
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publisher={IEEE}
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}
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@misc{seger1993vos,
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title={Voss: A Formal Hardware Verification System User's Guide},
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author={Seger, Carl-Johan H},
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year={1993},
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publisher={University of British Columbia. Department of Computer Science}
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}
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@inproceedings{seger2006integrating,
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title={Integrating design and verification-from simple idea to practical system},
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author={Seger, Carl},
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booktitle={Formal Methods and Models for Co-Design, 2006. MEMOCODE'06. Proceedings. Fourth ACM and IEEE International Conference on},
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pages={161--162},
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year={2006},
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organization={IEEE}
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}
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@inproceedings{seger2006design,
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title={The design of a floating point execution unit using the Integrated Design and Verification (IDV) system},
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author={Seger, Carl},
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booktitle={Int. Workshop on Designing Correct Circuits},
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year={2006}
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}
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@article{ullmann1976algorithm,
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title={An algorithm for subgraph isomorphism},
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author={Ullmann, Julian R},
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journal={Journal of the ACM (JACM)},
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volume={23},
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number={1},
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pages={31--42},
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year={1976},
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publisher={ACM}
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}
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@article{cordella2004sub,
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title={A (sub) graph isomorphism algorithm for matching large graphs},
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author={Cordella, Luigi P and Foggia, Pasquale and Sansone, Carlo and Vento, Mario},
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journal={IEEE transactions on pattern analysis and machine intelligence},
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volume={26},
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number={10},
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pages={1367--1372},
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year={2004},
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publisher={IEEE}
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}
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@misc{sysdig_cpu,
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author={Théophile Bastian and Noémie Cartier and Nathanaël Courant},
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title={``Système digital'' project},
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howpublished={\url{https://github.com/tobast/sysdig-full/}},
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year=2016
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}
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