Elaborate on signatures — content should be here

common/internship.sty

@@ -14,3 +14,5 @@
 
 \newcommand{\sigconst}[1]{\mathcal{SC}_{#1}}
 \newcommand{\sigop}{\mathfrak{h}}
+
+\newcommand{\sig}{\operatorname{sig}}

report/report.tex

@@ -293,8 +293,9 @@ $2^{32}$.  These constants are generated by a small python script,
 
 Those constants are used to produce a 64 bits unsigned value out of another 64
 bits unsigned value, called $v$ thereafter, through an operator $\sigop$,
-computed as follows.
+computed as follows (with all computations done on 64 bits unsigned integers).
 
+\vspace{1em}
 \begin{algorithmic}
     \Function{$\sigop$}{$\sigconst{}, v$}
         \State{} $out1 \gets (v + a) \cdot x_l$
@@ -305,6 +306,50 @@ computed as follows.
     \EndFunction{}
 \end{algorithmic}
 
+\paragraph{Expressions.} Each type of expression (or, in the case of
+expression with operator, each type of operator) has its signature constant,
+$\sigconst{\text{exprType}}$. The signature of a commutative expression in its
+operands is always commutative, and the signature of a non-commutative
+expression should not be (and is not, except for collisions). The value $v$
+used to sign the expression (in $\sigop(\sigconst{\text{exprType}}, v)$) is
+then the sum (respectively difference) of the signature of its parameters for
+commutative (respectively non-commutative) expressions.
+
+\paragraph{Circuits' inner signature.} Every circuit is associated with a value
+describing its \emph{type} (rather than its contents): 8 bits of circuit type
+ID (delay, tristate, \ldots), the number of inputs on the next 8 bits, and the
+number of outputs on 8 more bits. This value is then xored with the inner value
+of the circuit: for a combinatorial gate, the xor of its expressions'
+signatures; for a group, the sum of its children's signatures\footnote{As a
+group is likely to have multiple occurrences of a single identical circuit, it
+would be unwise to xor its children's signatures, even though the usual advice
+is to combine hashes by xoring them.}, \ldots This value constitutes the
+circuit's \emph{inner signature}.
+
+\paragraph{Circuits' signature of order $n$.} The inner signature does not
+capture at all the \emph{structure} of the graph. An information we can capture
+without breaking the signature's independence towards the order of description
+of the graph, is the set of its neighbours. Yet, we cannot ``label'' the gates
+without breaking this rule; thus, we represent the set of neighbours by the set
+of our \emph{neighbours' signatures}.
+
+At this point, we can define the \emph{signature of order $n$} ($n \in
+\natset$) of a circuit $C$ as follows:
+
+\begin{align*}
+    \sig_0(C) :&= \text{inner signature of } C\\
+    \sig_{n+1}(C) :&= \text{inner signature of }C
+        + \text{IO adjacency}
+        + \hspace{-2em}\sum\limits_{C_i \in \,\text{neighbours of inputs}}
+            \hspace{-2em}\sig_n(C_i) \hspace{1em}
+        - \hspace{-2em}\sum\limits_{C_o \in \,\text{neighbours of inputs}}
+            \hspace{-2em}\sig_n(C_o)
+\end{align*}
+
+The ``IO adjacency'' term is an additional term in the signatures of order
+above $0$, indicating what input and output pins of the circuit group
+containing the current gate are adjacent to it.
+
 %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
 \section{Group equality}
 \todo{}