16c00db4bb
Pull AFS fixes from David Howells:
"Here's a set of patches that fix a number of bugs in the in-kernel AFS
client, including:
- Fix directory locking to not use individual page locks for
directory reading/scanning but rather to use a semaphore on the
afs_vnode struct as the directory contents must be read in a single
blob and data from different reads must not be mixed as the entire
contents may be shuffled about between reads.
- Fix address list parsing to handle port specifiers correctly.
- Only give up callback records on a server if we actually talked to
that server (we might not be able to access a server).
- Fix some callback handling bugs, including refcounting,
whole-volume callbacks and when callbacks actually get broken in
response to a CB.CallBack op.
- Fix some server/address rotation bugs, including giving up if we
can't probe a server; giving up if a server says it doesn't have a
volume, but there are more servers to try.
- Fix the decoding of fetched statuses to be OpenAFS compatible.
- Fix the handling of server lookups in Cache Manager ops (such as
CB.InitCallBackState3) to use a UUID if possible and to handle no
server being found.
- Fix a bug in server lookup where not all addresses are compared.
- Fix the non-encryption of calls that prevents some servers from
being accessed (this also requires an AF_RXRPC patch that has
already gone in through the net tree).
There's also a patch that adds tracepoints to log Cache Manager ops
that don't find a matching server, either by UUID or by address"
* tag 'afs-fixes-20180514' of git://git.kernel.org/pub/scm/linux/kernel/git/dhowells/linux-fs:
afs: Fix the non-encryption of calls
afs: Fix CB.CallBack handling
afs: Fix whole-volume callback handling
afs: Fix afs_find_server search loop
afs: Fix the handling of an unfound server in CM operations
afs: Add a tracepoint to record callbacks from unlisted servers
afs: Fix the handling of CB.InitCallBackState3 to find the server by UUID
afs: Fix VNOVOL handling in address rotation
afs: Fix AFSFetchStatus decoder to provide OpenAFS compatibility
afs: Fix server rotation's handling of fileserver probe failure
afs: Fix refcounting in callback registration
afs: Fix giving up callbacks on server destruction
afs: Fix address list parsing
afs: Fix directory page locking
218 lines
11 KiB
JSON
218 lines
11 KiB
JSON
[
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{
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"CollectPEBSRecord": "1",
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"PublicDescription": "Counts page walks completed due to demand data loads (including SW prefetches) whose address translations missed in all TLB levels and were mapped to 4K pages. The page walks can end with or without a page fault.",
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"EventCode": "0x08",
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"Counter": "0,1,2,3",
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"UMask": "0x2",
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"PEBScounters": "0,1,2,3",
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"EventName": "DTLB_LOAD_MISSES.WALK_COMPLETED_4K",
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"PDIR_COUNTER": "na",
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"SampleAfterValue": "200003",
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"BriefDescription": "Page walk completed due to a demand load to a 4K page"
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},
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{
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"CollectPEBSRecord": "1",
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"PublicDescription": "Counts page walks completed due to demand data loads (including SW prefetches) whose address translations missed in all TLB levels and were mapped to 2M or 4M pages. The page walks can end with or without a page fault.",
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"EventCode": "0x08",
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"Counter": "0,1,2,3",
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"UMask": "0x4",
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"PEBScounters": "0,1,2,3",
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"EventName": "DTLB_LOAD_MISSES.WALK_COMPLETED_2M_4M",
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"PDIR_COUNTER": "na",
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"SampleAfterValue": "200003",
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"BriefDescription": "Page walk completed due to a demand load to a 2M or 4M page"
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},
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{
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"CollectPEBSRecord": "1",
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"PublicDescription": "Counts page walks completed due to demand data loads (including SW prefetches) whose address translations missed in all TLB levels and were mapped to 1GB pages. The page walks can end with or without a page fault.",
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"EventCode": "0x08",
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"Counter": "0,1,2,3",
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"UMask": "0x8",
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"PEBScounters": "0,1,2,3",
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"EventName": "DTLB_LOAD_MISSES.WALK_COMPLETED_1GB",
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"PDIR_COUNTER": "na",
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"SampleAfterValue": "200003",
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"BriefDescription": "Page walk completed due to a demand load to a 1GB page"
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},
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{
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"CollectPEBSRecord": "1",
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"PublicDescription": "Counts once per cycle for each page walk occurring due to a load (demand data loads or SW prefetches). Includes cycles spent traversing the Extended Page Table (EPT). Average cycles per walk can be calculated by dividing by the number of walks.",
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"EventCode": "0x08",
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"Counter": "0,1,2,3",
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"UMask": "0x10",
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"PEBScounters": "0,1,2,3",
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"EventName": "DTLB_LOAD_MISSES.WALK_PENDING",
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"PDIR_COUNTER": "na",
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"SampleAfterValue": "200003",
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"BriefDescription": "Page walks outstanding due to a demand load every cycle."
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},
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{
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"CollectPEBSRecord": "1",
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"PublicDescription": "Counts page walks completed due to demand data stores whose address translations missed in the TLB and were mapped to 4K pages. The page walks can end with or without a page fault.",
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"EventCode": "0x49",
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"Counter": "0,1,2,3",
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"UMask": "0x2",
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"PEBScounters": "0,1,2,3",
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"EventName": "DTLB_STORE_MISSES.WALK_COMPLETED_4K",
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"PDIR_COUNTER": "na",
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"SampleAfterValue": "2000003",
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"BriefDescription": "Page walk completed due to a demand data store to a 4K page"
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},
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{
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"CollectPEBSRecord": "1",
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"PublicDescription": "Counts page walks completed due to demand data stores whose address translations missed in the TLB and were mapped to 2M or 4M pages. The page walks can end with or without a page fault.",
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"EventCode": "0x49",
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"Counter": "0,1,2,3",
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"UMask": "0x4",
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"PEBScounters": "0,1,2,3",
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"EventName": "DTLB_STORE_MISSES.WALK_COMPLETED_2M_4M",
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"PDIR_COUNTER": "na",
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"SampleAfterValue": "2000003",
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"BriefDescription": "Page walk completed due to a demand data store to a 2M or 4M page"
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},
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{
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"CollectPEBSRecord": "1",
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"PublicDescription": "Counts page walks completed due to demand data stores whose address translations missed in the TLB and were mapped to 1GB pages. The page walks can end with or without a page fault.",
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"EventCode": "0x49",
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"Counter": "0,1,2,3",
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"UMask": "0x8",
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"PEBScounters": "0,1,2,3",
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"EventName": "DTLB_STORE_MISSES.WALK_COMPLETED_1GB",
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"PDIR_COUNTER": "na",
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"SampleAfterValue": "2000003",
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"BriefDescription": "Page walk completed due to a demand data store to a 1GB page"
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},
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{
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"CollectPEBSRecord": "1",
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"PublicDescription": "Counts once per cycle for each page walk occurring due to a demand data store. Includes cycles spent traversing the Extended Page Table (EPT). Average cycles per walk can be calculated by dividing by the number of walks.",
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"EventCode": "0x49",
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"Counter": "0,1,2,3",
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"UMask": "0x10",
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"PEBScounters": "0,1,2,3",
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"EventName": "DTLB_STORE_MISSES.WALK_PENDING",
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"PDIR_COUNTER": "na",
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"SampleAfterValue": "200003",
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"BriefDescription": "Page walks outstanding due to a demand data store every cycle."
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},
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{
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"CollectPEBSRecord": "1",
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"PublicDescription": "Counts once per cycle for each page walk only while traversing the Extended Page Table (EPT), and does not count during the rest of the translation. The EPT is used for translating Guest-Physical Addresses to Physical Addresses for Virtual Machine Monitors (VMMs). Average cycles per walk can be calculated by dividing the count by number of walks.",
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"EventCode": "0x4F",
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"Counter": "0,1,2,3",
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"UMask": "0x10",
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"PEBScounters": "0,1,2,3",
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"EventName": "EPT.WALK_PENDING",
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"PDIR_COUNTER": "na",
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"SampleAfterValue": "200003",
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"BriefDescription": "Page walks outstanding due to walking the EPT every cycle"
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},
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{
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"CollectPEBSRecord": "1",
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"PublicDescription": "Counts the number of times the machine was unable to find a translation in the Instruction Translation Lookaside Buffer (ITLB) for a linear address of an instruction fetch. It counts when new translation are filled into the ITLB. The event is speculative in nature, but will not count translations (page walks) that are begun and not finished, or translations that are finished but not filled into the ITLB.",
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"EventCode": "0x81",
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"Counter": "0,1,2,3",
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"UMask": "0x4",
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"PEBScounters": "0,1,2,3",
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"EventName": "ITLB.MISS",
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"PDIR_COUNTER": "na",
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"SampleAfterValue": "200003",
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"BriefDescription": "ITLB misses"
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},
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{
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"CollectPEBSRecord": "1",
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"PublicDescription": "Counts page walks completed due to instruction fetches whose address translations missed in the TLB and were mapped to 4K pages. The page walks can end with or without a page fault.",
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"EventCode": "0x85",
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"Counter": "0,1,2,3",
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"UMask": "0x2",
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"PEBScounters": "0,1,2,3",
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"EventName": "ITLB_MISSES.WALK_COMPLETED_4K",
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"PDIR_COUNTER": "na",
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"SampleAfterValue": "2000003",
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"BriefDescription": "Page walk completed due to an instruction fetch in a 4K page"
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},
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{
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"CollectPEBSRecord": "1",
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"PublicDescription": "Counts page walks completed due to instruction fetches whose address translations missed in the TLB and were mapped to 2M or 4M pages. The page walks can end with or without a page fault.",
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"EventCode": "0x85",
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"Counter": "0,1,2,3",
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"UMask": "0x4",
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"PEBScounters": "0,1,2,3",
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"EventName": "ITLB_MISSES.WALK_COMPLETED_2M_4M",
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"PDIR_COUNTER": "na",
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"SampleAfterValue": "2000003",
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"BriefDescription": "Page walk completed due to an instruction fetch in a 2M or 4M page"
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},
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{
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"CollectPEBSRecord": "1",
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"PublicDescription": "Counts page walks completed due to instruction fetches whose address translations missed in the TLB and were mapped to 1GB pages. The page walks can end with or without a page fault.",
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"EventCode": "0x85",
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"Counter": "0,1,2,3",
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"UMask": "0x8",
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"PEBScounters": "0,1,2,3",
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"EventName": "ITLB_MISSES.WALK_COMPLETED_1GB",
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"PDIR_COUNTER": "na",
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"SampleAfterValue": "2000003",
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"BriefDescription": "Page walk completed due to an instruction fetch in a 1GB page"
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},
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{
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"CollectPEBSRecord": "1",
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"PublicDescription": "Counts once per cycle for each page walk occurring due to an instruction fetch. Includes cycles spent traversing the Extended Page Table (EPT). Average cycles per walk can be calculated by dividing by the number of walks.",
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"EventCode": "0x85",
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"Counter": "0,1,2,3",
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"UMask": "0x10",
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"PEBScounters": "0,1,2,3",
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"EventName": "ITLB_MISSES.WALK_PENDING",
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"PDIR_COUNTER": "na",
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"SampleAfterValue": "200003",
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"BriefDescription": "Page walks outstanding due to an instruction fetch every cycle."
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},
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{
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"CollectPEBSRecord": "1",
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"PublicDescription": "Counts STLB flushes. The TLBs are flushed on instructions like INVLPG and MOV to CR3.",
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"EventCode": "0xBD",
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"Counter": "0,1,2,3",
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"UMask": "0x20",
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"PEBScounters": "0,1,2,3",
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"EventName": "TLB_FLUSHES.STLB_ANY",
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"PDIR_COUNTER": "na",
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"SampleAfterValue": "20003",
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"BriefDescription": "STLB flushes"
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},
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{
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"PEBS": "2",
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"CollectPEBSRecord": "2",
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"PublicDescription": "Counts load uops retired that caused a DTLB miss.",
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"EventCode": "0xD0",
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"Counter": "0,1,2,3",
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"UMask": "0x11",
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"PEBScounters": "0,1,2,3",
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"EventName": "MEM_UOPS_RETIRED.DTLB_MISS_LOADS",
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"SampleAfterValue": "200003",
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"BriefDescription": "Load uops retired that missed the DTLB (Precise event capable)"
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},
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{
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"PEBS": "2",
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"CollectPEBSRecord": "2",
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"PublicDescription": "Counts store uops retired that caused a DTLB miss.",
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"EventCode": "0xD0",
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"Counter": "0,1,2,3",
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"UMask": "0x12",
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"PEBScounters": "0,1,2,3",
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"EventName": "MEM_UOPS_RETIRED.DTLB_MISS_STORES",
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"SampleAfterValue": "200003",
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"BriefDescription": "Store uops retired that missed the DTLB (Precise event capable)"
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},
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{
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"PEBS": "2",
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"CollectPEBSRecord": "2",
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"PublicDescription": "Counts uops retired that had a DTLB miss on load, store or either. Note that when two distinct memory operations to the same page miss the DTLB, only one of them will be recorded as a DTLB miss.",
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"EventCode": "0xD0",
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"Counter": "0,1,2,3",
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"UMask": "0x13",
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"PEBScounters": "0,1,2,3",
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"EventName": "MEM_UOPS_RETIRED.DTLB_MISS",
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"SampleAfterValue": "200003",
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"BriefDescription": "Memory uops retired that missed the DTLB (Precise event capable)"
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}
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] |