16c00db4bb
Pull AFS fixes from David Howells:
"Here's a set of patches that fix a number of bugs in the in-kernel AFS
client, including:
- Fix directory locking to not use individual page locks for
directory reading/scanning but rather to use a semaphore on the
afs_vnode struct as the directory contents must be read in a single
blob and data from different reads must not be mixed as the entire
contents may be shuffled about between reads.
- Fix address list parsing to handle port specifiers correctly.
- Only give up callback records on a server if we actually talked to
that server (we might not be able to access a server).
- Fix some callback handling bugs, including refcounting,
whole-volume callbacks and when callbacks actually get broken in
response to a CB.CallBack op.
- Fix some server/address rotation bugs, including giving up if we
can't probe a server; giving up if a server says it doesn't have a
volume, but there are more servers to try.
- Fix the decoding of fetched statuses to be OpenAFS compatible.
- Fix the handling of server lookups in Cache Manager ops (such as
CB.InitCallBackState3) to use a UUID if possible and to handle no
server being found.
- Fix a bug in server lookup where not all addresses are compared.
- Fix the non-encryption of calls that prevents some servers from
being accessed (this also requires an AF_RXRPC patch that has
already gone in through the net tree).
There's also a patch that adds tracepoints to log Cache Manager ops
that don't find a matching server, either by UUID or by address"
* tag 'afs-fixes-20180514' of git://git.kernel.org/pub/scm/linux/kernel/git/dhowells/linux-fs:
afs: Fix the non-encryption of calls
afs: Fix CB.CallBack handling
afs: Fix whole-volume callback handling
afs: Fix afs_find_server search loop
afs: Fix the handling of an unfound server in CM operations
afs: Add a tracepoint to record callbacks from unlisted servers
afs: Fix the handling of CB.InitCallBackState3 to find the server by UUID
afs: Fix VNOVOL handling in address rotation
afs: Fix AFSFetchStatus decoder to provide OpenAFS compatibility
afs: Fix server rotation's handling of fileserver probe failure
afs: Fix refcounting in callback registration
afs: Fix giving up callbacks on server destruction
afs: Fix address list parsing
afs: Fix directory page locking
422 lines
No EOL
16 KiB
JSON
422 lines
No EOL
16 KiB
JSON
[
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{
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"PublicDescription": "This event counts the number of memory ordering Machine Clears detected. Memory Ordering Machine Clears can result from memory disambiguation, external snoops, or cross SMT-HW-thread snoop (stores) hitting load buffers. Machine clears can have a significant performance impact if they are happening frequently.",
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"EventCode": "0xC3",
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"Counter": "0,1,2,3",
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"UMask": "0x2",
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"EventName": "MACHINE_CLEARS.MEMORY_ORDERING",
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"SampleAfterValue": "100003",
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"BriefDescription": "Counts the number of machine clears due to memory order conflicts.",
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"CounterHTOff": "0,1,2,3,4,5,6,7"
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},
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{
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"PEBS": "2",
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"EventCode": "0xCD",
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"MSRValue": "0x4",
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"Counter": "3",
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"UMask": "0x1",
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"EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_4",
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"MSRIndex": "0x3F6",
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"SampleAfterValue": "100003",
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"BriefDescription": "Loads with latency value being above 4 .",
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"TakenAlone": "1",
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"CounterHTOff": "3"
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},
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{
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"PEBS": "2",
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"EventCode": "0xCD",
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"MSRValue": "0x8",
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"Counter": "3",
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"UMask": "0x1",
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"EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_8",
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"MSRIndex": "0x3F6",
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"SampleAfterValue": "50021",
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"BriefDescription": "Loads with latency value being above 8.",
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"TakenAlone": "1",
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"CounterHTOff": "3"
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},
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{
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"PEBS": "2",
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"EventCode": "0xCD",
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"MSRValue": "0x10",
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"Counter": "3",
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"UMask": "0x1",
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"EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_16",
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"MSRIndex": "0x3F6",
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"SampleAfterValue": "20011",
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"BriefDescription": "Loads with latency value being above 16.",
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"TakenAlone": "1",
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"CounterHTOff": "3"
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},
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{
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"PEBS": "2",
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"EventCode": "0xCD",
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"MSRValue": "0x20",
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"Counter": "3",
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"UMask": "0x1",
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"EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_32",
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"MSRIndex": "0x3F6",
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"SampleAfterValue": "100007",
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"BriefDescription": "Loads with latency value being above 32.",
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"TakenAlone": "1",
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"CounterHTOff": "3"
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},
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{
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"PEBS": "2",
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"EventCode": "0xCD",
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"MSRValue": "0x40",
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"Counter": "3",
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"UMask": "0x1",
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"EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_64",
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"MSRIndex": "0x3F6",
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"SampleAfterValue": "2003",
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"BriefDescription": "Loads with latency value being above 64.",
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"TakenAlone": "1",
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"CounterHTOff": "3"
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},
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{
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"PEBS": "2",
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"EventCode": "0xCD",
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"MSRValue": "0x80",
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"Counter": "3",
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"UMask": "0x1",
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"EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_128",
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"MSRIndex": "0x3F6",
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"SampleAfterValue": "1009",
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"BriefDescription": "Loads with latency value being above 128.",
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"TakenAlone": "1",
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"CounterHTOff": "3"
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},
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{
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"PEBS": "2",
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"EventCode": "0xCD",
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"MSRValue": "0x100",
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"Counter": "3",
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"UMask": "0x1",
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"EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_256",
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"MSRIndex": "0x3F6",
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"SampleAfterValue": "503",
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"BriefDescription": "Loads with latency value being above 256.",
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"TakenAlone": "1",
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"CounterHTOff": "3"
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},
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{
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"PEBS": "2",
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"EventCode": "0xCD",
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"MSRValue": "0x200",
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"Counter": "3",
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"UMask": "0x1",
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"EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_512",
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"MSRIndex": "0x3F6",
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"SampleAfterValue": "101",
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"BriefDescription": "Loads with latency value being above 512.",
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"TakenAlone": "1",
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"CounterHTOff": "3"
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},
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{
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"PEBS": "2",
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"EventCode": "0xCD",
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"Counter": "3",
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"UMask": "0x2",
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"EventName": "MEM_TRANS_RETIRED.PRECISE_STORE",
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"SampleAfterValue": "2000003",
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"BriefDescription": "Sample stores and collect precise store operation via PEBS record. PMC3 only. (Precise Event - PEBS).",
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"PRECISE_STORE": "1",
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"TakenAlone": "1",
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"CounterHTOff": "3"
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},
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{
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"EventCode": "0x05",
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"Counter": "0,1,2,3",
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"UMask": "0x1",
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"EventName": "MISALIGN_MEM_REF.LOADS",
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"SampleAfterValue": "2000003",
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"BriefDescription": "Speculative cache line split load uops dispatched to L1 cache.",
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"CounterHTOff": "0,1,2,3,4,5,6,7"
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},
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{
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"EventCode": "0x05",
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"Counter": "0,1,2,3",
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"UMask": "0x2",
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"EventName": "MISALIGN_MEM_REF.STORES",
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"SampleAfterValue": "2000003",
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"BriefDescription": "Speculative cache line split STA uops dispatched to L1 cache.",
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"CounterHTOff": "0,1,2,3,4,5,6,7"
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},
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{
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"EventCode": "0xB7, 0xBB",
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"MSRValue": "0x3fffc20004",
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"Counter": "0,1,2,3",
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"UMask": "0x1",
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"Offcore": "1",
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"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.LLC_MISS.ANY_RESPONSE",
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"MSRIndex": "0x1a6,0x1a7",
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"SampleAfterValue": "100003",
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"BriefDescription": "Counts all demand code reads that miss the LLC",
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"CounterHTOff": "0,1,2,3"
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},
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{
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"EventCode": "0xB7, 0xBB",
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"MSRValue": "0x600400004",
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"Counter": "0,1,2,3",
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"UMask": "0x1",
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"Offcore": "1",
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"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.LLC_MISS.LOCAL_DRAM",
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"MSRIndex": "0x1a6,0x1a7",
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"SampleAfterValue": "100003",
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"BriefDescription": "Counts all demand code reads that miss the LLC and the data returned from local dram",
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"CounterHTOff": "0,1,2,3"
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},
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{
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"EventCode": "0xB7, 0xBB",
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"MSRValue": "0x67f800004",
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"Counter": "0,1,2,3",
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"UMask": "0x1",
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"Offcore": "1",
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"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.LLC_MISS.REMOTE_DRAM",
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"MSRIndex": "0x1a6,0x1a7",
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"SampleAfterValue": "100003",
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"BriefDescription": "Counts all demand code reads that miss the LLC and the data returned from remote dram",
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"CounterHTOff": "0,1,2,3"
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},
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{
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"EventCode": "0xB7, 0xBB",
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"MSRValue": "0x87f820004",
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"Counter": "0,1,2,3",
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"UMask": "0x1",
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"Offcore": "1",
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"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.LLC_MISS.REMOTE_HIT_FORWARD",
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"MSRIndex": "0x1a6,0x1a7",
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"SampleAfterValue": "100003",
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"BriefDescription": "Counts all demand code reads that miss the LLC and the data forwarded from remote cache",
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"CounterHTOff": "0,1,2,3"
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},
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{
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"EventCode": "0xB7, 0xBB",
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"MSRValue": "0x107fc00004",
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"Counter": "0,1,2,3",
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"UMask": "0x1",
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"Offcore": "1",
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"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.LLC_MISS.REMOTE_HITM",
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"MSRIndex": "0x1a6,0x1a7",
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"SampleAfterValue": "100003",
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"BriefDescription": "Counts all demand code reads that miss the LLC the data is found in M state in remote cache and forwarded from there",
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"CounterHTOff": "0,1,2,3"
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},
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{
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"EventCode": "0xB7, 0xBB",
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"MSRValue": "0x67fc00001",
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"Counter": "0,1,2,3",
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"UMask": "0x1",
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"Offcore": "1",
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"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.LLC_MISS.ANY_DRAM",
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"MSRIndex": "0x1a6,0x1a7",
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"SampleAfterValue": "100003",
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"BriefDescription": "Counts demand data reads that miss the LLC and the data returned from remote & local dram",
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"CounterHTOff": "0,1,2,3"
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},
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{
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"EventCode": "0xB7, 0xBB",
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"MSRValue": "0x3fffc20001",
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"Counter": "0,1,2,3",
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"UMask": "0x1",
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"Offcore": "1",
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"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.LLC_MISS.ANY_RESPONSE",
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"MSRIndex": "0x1a6,0x1a7",
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"SampleAfterValue": "100003",
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"BriefDescription": "Counts demand data reads that miss in the LLC",
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"CounterHTOff": "0,1,2,3"
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},
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{
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"EventCode": "0xB7, 0xBB",
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"MSRValue": "0x600400001",
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"Counter": "0,1,2,3",
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"UMask": "0x1",
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"Offcore": "1",
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"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.LLC_MISS.LOCAL_DRAM",
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"MSRIndex": "0x1a6,0x1a7",
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"SampleAfterValue": "100003",
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"BriefDescription": "Counts demand data reads that miss the LLC and the data returned from local dram",
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"CounterHTOff": "0,1,2,3"
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},
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{
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"EventCode": "0xB7, 0xBB",
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"MSRValue": "0x67f800001",
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"Counter": "0,1,2,3",
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"UMask": "0x1",
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"Offcore": "1",
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"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.LLC_MISS.REMOTE_DRAM",
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"MSRIndex": "0x1a6,0x1a7",
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"SampleAfterValue": "100003",
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"BriefDescription": "Counts demand data reads that miss the LLC and the data returned from remote dram",
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"CounterHTOff": "0,1,2,3"
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},
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{
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"EventCode": "0xB7, 0xBB",
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"MSRValue": "0x87f820001",
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"Counter": "0,1,2,3",
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"UMask": "0x1",
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"Offcore": "1",
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"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.LLC_MISS.REMOTE_HIT_FORWARD",
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"MSRIndex": "0x1a6,0x1a7",
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"SampleAfterValue": "100003",
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"BriefDescription": "Counts demand data reads that miss the LLC and the data forwarded from remote cache",
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"CounterHTOff": "0,1,2,3"
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},
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{
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"EventCode": "0xB7, 0xBB",
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"MSRValue": "0x107fc00001",
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"Counter": "0,1,2,3",
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"UMask": "0x1",
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"Offcore": "1",
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"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.LLC_MISS.REMOTE_HITM",
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"MSRIndex": "0x1a6,0x1a7",
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"SampleAfterValue": "100003",
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"BriefDescription": "Counts demand data reads that miss the LLC the data is found in M state in remote cache and forwarded from there",
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"CounterHTOff": "0,1,2,3"
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},
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{
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"EventCode": "0xB7, 0xBB",
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"MSRValue": "0x3fffc20040",
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"Counter": "0,1,2,3",
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"UMask": "0x1",
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"Offcore": "1",
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"EventName": "OFFCORE_RESPONSE.PF_L2_CODE_RD.LLC_MISS.ANY_RESPONSE",
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"MSRIndex": "0x1a6,0x1a7",
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"SampleAfterValue": "100003",
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"BriefDescription": "Counts all prefetch (that bring data to L2) code reads that miss the LLC and the data returned from remote & local dram",
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"CounterHTOff": "0,1,2,3"
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},
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{
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"EventCode": "0xB7, 0xBB",
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"MSRValue": "0x67fc00010",
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"Counter": "0,1,2,3",
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"UMask": "0x1",
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"Offcore": "1",
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"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.LLC_MISS.ANY_DRAM",
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"MSRIndex": "0x1a6,0x1a7",
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"SampleAfterValue": "100003",
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"BriefDescription": "Counts prefetch (that bring data to L2) data reads that miss the LLC and the data returned from remote & local dram",
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"CounterHTOff": "0,1,2,3"
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},
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{
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"EventCode": "0xB7, 0xBB",
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"MSRValue": "0x3fffc20010",
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"Counter": "0,1,2,3",
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"UMask": "0x1",
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"Offcore": "1",
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"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.LLC_MISS.ANY_RESPONSE",
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"MSRIndex": "0x1a6,0x1a7",
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"SampleAfterValue": "100003",
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"BriefDescription": "Counts prefetch (that bring data to L2) data reads that miss in the LLC",
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"CounterHTOff": "0,1,2,3"
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},
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{
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"EventCode": "0xB7, 0xBB",
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"MSRValue": "0x600400010",
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"Counter": "0,1,2,3",
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"UMask": "0x1",
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"Offcore": "1",
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"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.LLC_MISS.LOCAL_DRAM",
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"MSRIndex": "0x1a6,0x1a7",
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"SampleAfterValue": "100003",
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"BriefDescription": "Counts prefetch (that bring data to L2) data reads that miss the LLC and the data returned from local dram",
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"CounterHTOff": "0,1,2,3"
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},
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{
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"EventCode": "0xB7, 0xBB",
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"MSRValue": "0x67f800010",
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"Counter": "0,1,2,3",
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"UMask": "0x1",
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"Offcore": "1",
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"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.LLC_MISS.REMOTE_DRAM",
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"MSRIndex": "0x1a6,0x1a7",
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"SampleAfterValue": "100003",
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"BriefDescription": "Counts prefetch (that bring data to L2) data reads that miss the LLC and the data returned from remote dram",
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"CounterHTOff": "0,1,2,3"
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},
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{
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"EventCode": "0xB7, 0xBB",
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"MSRValue": "0x87f820010",
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"Counter": "0,1,2,3",
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"UMask": "0x1",
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"Offcore": "1",
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"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.LLC_MISS.REMOTE_HIT_FORWARD",
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"MSRIndex": "0x1a6,0x1a7",
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"SampleAfterValue": "100003",
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"BriefDescription": "Counts prefetch (that bring data to L2) data reads that miss the LLC and the data forwarded from remote cache",
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"CounterHTOff": "0,1,2,3"
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},
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{
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"EventCode": "0xB7, 0xBB",
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"MSRValue": "0x107fc00010",
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"Counter": "0,1,2,3",
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"UMask": "0x1",
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"Offcore": "1",
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"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.LLC_MISS.REMOTE_HITM",
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"MSRIndex": "0x1a6,0x1a7",
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"SampleAfterValue": "100003",
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"BriefDescription": "Counts prefetch (that bring data to L2) data reads that miss the LLC the data is found in M state in remote cache and forwarded from there",
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"CounterHTOff": "0,1,2,3"
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},
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{
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"EventCode": "0xB7, 0xBB",
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"MSRValue": "0x3fffc20200",
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"Counter": "0,1,2,3",
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"UMask": "0x1",
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"Offcore": "1",
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"EventName": "OFFCORE_RESPONSE.PF_LLC_CODE_RD.LLC_MISS.ANY_RESPONSE",
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"MSRIndex": "0x1a6,0x1a7",
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"SampleAfterValue": "100003",
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"BriefDescription": "Counts all prefetch (that bring data to LLC only) code reads that miss in the LLC",
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"CounterHTOff": "0,1,2,3"
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},
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{
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"EventCode": "0xB7, 0xBB",
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"MSRValue": "0x3fffc20080",
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"Counter": "0,1,2,3",
|
|
"UMask": "0x1",
|
|
"Offcore": "1",
|
|
"EventName": "OFFCORE_RESPONSE.PF_LLC_DATA_RD.LLC_MISS.ANY_RESPONSE",
|
|
"MSRIndex": "0x1a6,0x1a7",
|
|
"SampleAfterValue": "100003",
|
|
"BriefDescription": "Counts prefetch (that bring data to LLC only) data reads that hit in the LLC and the snoops sent to sibling cores return clean response",
|
|
"CounterHTOff": "0,1,2,3"
|
|
},
|
|
{
|
|
"EventCode": "0xB7, 0xBB",
|
|
"MSRValue": "0x600400077",
|
|
"Counter": "0,1,2,3",
|
|
"UMask": "0x1",
|
|
"Offcore": "1",
|
|
"EventName": "OFFCORE_RESPONSE.ALL_DEMAND_MLC_PREF_READS.LLC_MISS.LOCAL_DRAM",
|
|
"MSRIndex": "0x1a6,0x1a7",
|
|
"SampleAfterValue": "100003",
|
|
"BriefDescription": "Counts all local dram accesses for all demand and L2 prefetches. LLC prefetches are excluded.",
|
|
"CounterHTOff": "0,1,2,3"
|
|
},
|
|
{
|
|
"EventCode": "0xB7, 0xBB",
|
|
"MSRValue": "0x3FFFC20077",
|
|
"Counter": "0,1,2,3",
|
|
"UMask": "0x1",
|
|
"Offcore": "1",
|
|
"EventName": "OFFCORE_RESPONSE.ALL_DEMAND_MLC_PREF_READS.LLC_MISS.ANY_RESPONSE",
|
|
"MSRIndex": "0x1a6,0x1a7",
|
|
"SampleAfterValue": "100003",
|
|
"BriefDescription": "This event counts all LLC misses for all demand and L2 prefetches. LLC prefetches are excluded.",
|
|
"CounterHTOff": "0,1,2,3"
|
|
},
|
|
{
|
|
"EventCode": "0xB7, 0xBB",
|
|
"MSRValue": "0x187FC20077",
|
|
"Counter": "0,1,2,3",
|
|
"UMask": "0x1",
|
|
"Offcore": "1",
|
|
"EventName": "OFFCORE_RESPONSE.ALL_DEMAND_MLC_PREF_READS.LLC_MISS.REMOTE_HITM_HIT_FORWARD",
|
|
"MSRIndex": "0x1a6,0x1a7",
|
|
"SampleAfterValue": "100003",
|
|
"BriefDescription": "This event counts all remote cache-to-cache transfers (includes HITM and HIT-Forward) for all demand and L2 prefetches. LLC prefetches are excluded.",
|
|
"CounterHTOff": "0,1,2,3"
|
|
}
|
|
] |