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perf-eh_elf/pmu-events/arch/x86/skylake/uncore.json
Linus Torvalds 16c00db4bb Merge tag 'afs-fixes-20180514' of git://git.kernel.org/pub/scm/linux/kernel/git/dhowells/linux-fs 
Pull AFS fixes from David Howells:
 "Here's a set of patches that fix a number of bugs in the in-kernel AFS
  client, including:

   - Fix directory locking to not use individual page locks for
     directory reading/scanning but rather to use a semaphore on the
     afs_vnode struct as the directory contents must be read in a single
     blob and data from different reads must not be mixed as the entire
     contents may be shuffled about between reads.

   - Fix address list parsing to handle port specifiers correctly.

   - Only give up callback records on a server if we actually talked to
     that server (we might not be able to access a server).

   - Fix some callback handling bugs, including refcounting,
     whole-volume callbacks and when callbacks actually get broken in
     response to a CB.CallBack op.

   - Fix some server/address rotation bugs, including giving up if we
     can't probe a server; giving up if a server says it doesn't have a
     volume, but there are more servers to try.

   - Fix the decoding of fetched statuses to be OpenAFS compatible.

   - Fix the handling of server lookups in Cache Manager ops (such as
     CB.InitCallBackState3) to use a UUID if possible and to handle no
     server being found.

   - Fix a bug in server lookup where not all addresses are compared.

   - Fix the non-encryption of calls that prevents some servers from
     being accessed (this also requires an AF_RXRPC patch that has
     already gone in through the net tree).

  There's also a patch that adds tracepoints to log Cache Manager ops
  that don't find a matching server, either by UUID or by address"

* tag 'afs-fixes-20180514' of git://git.kernel.org/pub/scm/linux/kernel/git/dhowells/linux-fs:
  afs: Fix the non-encryption of calls
  afs: Fix CB.CallBack handling
  afs: Fix whole-volume callback handling
  afs: Fix afs_find_server search loop
  afs: Fix the handling of an unfound server in CM operations
  afs: Add a tracepoint to record callbacks from unlisted servers
  afs: Fix the handling of CB.InitCallBackState3 to find the server by UUID
  afs: Fix VNOVOL handling in address rotation
  afs: Fix AFSFetchStatus decoder to provide OpenAFS compatibility
  afs: Fix server rotation's handling of fileserver probe failure
  afs: Fix refcounting in callback registration
  afs: Fix giving up callbacks on server destruction
  afs: Fix address list parsing
  afs: Fix directory page locking
2018-05-15 10:48:36 -07:00

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[
{
"Unit": "CBO",
"EventCode": "0x22",
"UMask": "0x41",
"EventName": "UNC_CBO_XSNP_RESPONSE.MISS_XCORE",
"BriefDescription": "A cross-core snoop initiated by this Cbox due to processor core memory request which misses in some processor core.",
"PublicDescription": "A cross-core snoop initiated by this Cbox due to processor core memory request which misses in some processor core.",
"Counter": "0,1",
"CounterMask": "0",
"Invert": "0",
"EdgeDetect": "0"
},
{
"Unit": "CBO",
"EventCode": "0x22",
"UMask": "0x81",
"EventName": "UNC_CBO_XSNP_RESPONSE.MISS_EVICTION",
"BriefDescription": "A cross-core snoop resulted from L3 Eviction which misses in some processor core.",
"PublicDescription": "A cross-core snoop resulted from L3 Eviction which misses in some processor core.",
"Counter": "0,1",
"CounterMask": "0",
"Invert": "0",
"EdgeDetect": "0"
},
{
"Unit": "CBO",
"EventCode": "0x22",
"UMask": "0x44",
"EventName": "UNC_CBO_XSNP_RESPONSE.HIT_XCORE",
"BriefDescription": "A cross-core snoop initiated by this Cbox due to processor core memory request which hits a non-modified line in some processor core.",
"PublicDescription": "A cross-core snoop initiated by this Cbox due to processor core memory request which hits a non-modified line in some processor core.",
"Counter": "0,1",
"CounterMask": "0",
"Invert": "0",
"EdgeDetect": "0"
},
{
"Unit": "CBO",
"EventCode": "0x22",
"UMask": "0x48",
"EventName": "UNC_CBO_XSNP_RESPONSE.HITM_XCORE",
"BriefDescription": "A cross-core snoop initiated by this Cbox due to processor core memory request which hits a modified line in some processor core.",
"PublicDescription": "A cross-core snoop initiated by this Cbox due to processor core memory request which hits a modified line in some processor core.",
"Counter": "0,1",
"CounterMask": "0",
"Invert": "0",
"EdgeDetect": "0"
},
{
"Unit": "CBO",
"EventCode": "0x34",
"UMask": "0x21",
"EventName": "UNC_CBO_CACHE_LOOKUP.WRITE_M",
"BriefDescription": "L3 Lookup write request that access cache and found line in M-state",
"PublicDescription": "L3 Lookup write request that access cache and found line in M-state.",
"Counter": "0,1",
"CounterMask": "0",
"Invert": "0",
"EdgeDetect": "0"
},
{
"Unit": "CBO",
"EventCode": "0x34",
"UMask": "0x81",
"EventName": "UNC_CBO_CACHE_LOOKUP.ANY_M",
"BriefDescription": "L3 Lookup any request that access cache and found line in M-state",
"PublicDescription": "L3 Lookup any request that access cache and found line in M-state.",
"Counter": "0,1",
"CounterMask": "0",
"Invert": "0",
"EdgeDetect": "0"
},
{
"Unit": "CBO",
"EventCode": "0x34",
"UMask": "0x18",
"EventName": "UNC_CBO_CACHE_LOOKUP.READ_I",
"BriefDescription": "L3 Lookup read request that access cache and found line in I-state",
"PublicDescription": "L3 Lookup read request that access cache and found line in I-state.",
"Counter": "0,1",
"CounterMask": "0",
"Invert": "0",
"EdgeDetect": "0"
},
{
"Unit": "CBO",
"EventCode": "0x34",
"UMask": "0x88",
"EventName": "UNC_CBO_CACHE_LOOKUP.ANY_I",
"BriefDescription": "L3 Lookup any request that access cache and found line in I-state",
"PublicDescription": "L3 Lookup any request that access cache and found line in I-state.",
"Counter": "0,1",
"CounterMask": "0",
"Invert": "0",
"EdgeDetect": "0"
},
{
"Unit": "CBO",
"EventCode": "0x34",
"UMask": "0x1f",
"EventName": "UNC_CBO_CACHE_LOOKUP.READ_MESI",
"BriefDescription": "L3 Lookup read request that access cache and found line in any MESI-state",
"PublicDescription": "L3 Lookup read request that access cache and found line in any MESI-state.",
"Counter": "0,1",
"CounterMask": "0",
"Invert": "0",
"EdgeDetect": "0"
},
{
"Unit": "CBO",
"EventCode": "0x34",
"UMask": "0x2f",
"EventName": "UNC_CBO_CACHE_LOOKUP.WRITE_MESI",
"BriefDescription": "L3 Lookup write request that access cache and found line in MESI-state",
"PublicDescription": "L3 Lookup write request that access cache and found line in MESI-state.",
"Counter": "0,1",
"CounterMask": "0",
"Invert": "0",
"EdgeDetect": "0"
},
{
"Unit": "CBO",
"EventCode": "0x34",
"UMask": "0x8f",
"EventName": "UNC_CBO_CACHE_LOOKUP.ANY_MESI",
"BriefDescription": "L3 Lookup any request that access cache and found line in MESI-state",
"PublicDescription": "L3 Lookup any request that access cache and found line in MESI-state.",
"Counter": "0,1",
"CounterMask": "0",
"Invert": "0",
"EdgeDetect": "0"
},
{
"Unit": "CBO",
"EventCode": "0x34",
"UMask": "0x86",
"EventName": "UNC_CBO_CACHE_LOOKUP.ANY_ES",
"BriefDescription": "L3 Lookup any request that access cache and found line in E or S-state",
"PublicDescription": "L3 Lookup any request that access cache and found line in E or S-state.",
"Counter": "0,1",
"CounterMask": "0",
"Invert": "0",
"EdgeDetect": "0"
},
{
"Unit": "CBO",
"EventCode": "0x34",
"UMask": "0x16",
"EventName": "UNC_CBO_CACHE_LOOKUP.READ_ES",
"BriefDescription": "L3 Lookup read request that access cache and found line in E or S-state",
"PublicDescription": "L3 Lookup read request that access cache and found line in E or S-state.",
"Counter": "0,1",
"CounterMask": "0",
"Invert": "0",
"EdgeDetect": "0"
},
{
"Unit": "CBO",
"EventCode": "0x34",
"UMask": "0x26",
"EventName": "UNC_CBO_CACHE_LOOKUP.WRITE_ES",
"BriefDescription": "L3 Lookup write request that access cache and found line in E or S-state",
"PublicDescription": "L3 Lookup write request that access cache and found line in E or S-state.",
"Counter": "0,1",
"CounterMask": "0",
"Invert": "0",
"EdgeDetect": "0"
},
{
"Unit": "iMPH-U",
"EventCode": "0x80",
"UMask": "0x01",
"EventName": "UNC_ARB_TRK_OCCUPANCY.ALL",
"BriefDescription": "Each cycle count number of all Core outgoing valid entries. Such entry is defined as valid from its allocation till first of IDI0 or DRS0 messages is sent out. Accounts for Coherent and non-coherent traffic.",
"PublicDescription": "Each cycle count number of all Core outgoing valid entries. Such entry is defined as valid from its allocation till first of IDI0 or DRS0 messages is sent out. Accounts for Coherent and non-coherent traffic.",
"Counter": "0",
"CounterMask": "0",
"Invert": "0",
"EdgeDetect": "0"
},
{
"Unit": "iMPH-U",
"EventCode": "0x81",
"UMask": "0x01",
"EventName": "UNC_ARB_TRK_REQUESTS.ALL",
"BriefDescription": "Total number of Core outgoing entries allocated. Accounts for Coherent and non-coherent traffic.",
"PublicDescription": "Total number of Core outgoing entries allocated. Accounts for Coherent and non-coherent traffic.",
"Counter": "0,1",
"CounterMask": "0",
"Invert": "0",
"EdgeDetect": "0"
},
{
"Unit": "iMPH-U",
"EventCode": "0x81",
"UMask": "0x02",
"EventName": "UNC_ARB_TRK_REQUESTS.DRD_DIRECT",
"BriefDescription": "Number of Core coherent Data Read entries allocated in DirectData mode",
"PublicDescription": "Number of Core coherent Data Read entries allocated in DirectData mode.",
"Counter": "0,1",
"CounterMask": "0",
"Invert": "0",
"EdgeDetect": "0"
},
{
"Unit": "iMPH-U",
"EventCode": "0x81",
"UMask": "0x20",
"EventName": "UNC_ARB_TRK_REQUESTS.WRITES",
"BriefDescription": "Number of Writes allocated - any write transactions: full/partials writes and evictions.",
"PublicDescription": "Number of Writes allocated - any write transactions: full/partials writes and evictions.",
"Counter": "0,1",
"CounterMask": "0",
"Invert": "0",
"EdgeDetect": "0"
},
{
"Unit": "iMPH-U",
"EventCode": "0x84",
"UMask": "0x01",
"EventName": "UNC_ARB_COH_TRK_REQUESTS.ALL",
"BriefDescription": "Number of entries allocated. Account for Any type: e.g. Snoop, Core aperture, etc.",
"PublicDescription": "Number of entries allocated. Account for Any type: e.g. Snoop, Core aperture, etc.",
"Counter": "0,1",
"CounterMask": "0",
"Invert": "0",
"EdgeDetect": "0"
},
{
"Unit": "iMPH-U",
"EventCode": "0x80",
"UMask": "0x01",
"EventName": "UNC_ARB_TRK_OCCUPANCY.CYCLES_WITH_ANY_REQUEST",
"BriefDescription": "Cycles with at least one request outstanding is waiting for data return from memory controller. Account for coherent and non-coherent requests initiated by IA Cores, Processor Graphics Unit, or LLC.;",
"PublicDescription": "Cycles with at least one request outstanding is waiting for data return from memory controller. Account for coherent and non-coherent requests initiated by IA Cores, Processor Graphics Unit, or LLC.",
"Counter": "0",
"CounterMask": "1",
"Invert": "0",
"EdgeDetect": "0"
},
{
"Unit": "NCU",
"EventCode": "0x0",
"UMask": "0x01",
"EventName": "UNC_CLOCK.SOCKET",
"BriefDescription": "This 48-bit fixed counter counts the UCLK cycles",
"PublicDescription": "This 48-bit fixed counter counts the UCLK cycles.",
"Counter": "FIXED",
"CounterMask": "0",
"Invert": "0",
"EdgeDetect": "0"
}
]
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