1
0
Fork 0
mirror of https://github.com/tobast/libunwind-eh_elf.git synced 2024-06-17 07:21:44 +02:00
libunwind-eh_elf/tests/flush-cache.S
Bruna Moreira 1eddefc371 [ARM] This patch add some missing bits on ARM platform.
* src/arm/unwind_i (arm_lock, arm_local_resume): Define.
 * src/ptrace/_UPT_find_proc_info.c: Handle ARM like X86 etc.
 * tests/flush-cache.S (flush_cache): Add (dummy) ARM-version.
	ARM does need executable stack, even on Linux...

Signed-off-by: Anderson Lizardo <anderson.lizardo@indt.org.br>
Signed-off-by: Bruna Moreira <bruna.moreira@indt.org.br>
2008-04-21 13:43:18 -06:00

83 lines
1.6 KiB
ArmAsm

#if defined(__ia64__)
.global flush_cache
.proc flush_cache
flush_cache:
.prologue
alloc r2=ar.pfs,2,0,0,0
add r8=31,in1 // round up to 32 byte-boundary
;;
shr.u r8=r8,5 // we flush 32 bytes per iteration
;;
add r8=-1,r8
.save ar.lc, r3
mov r3=ar.lc // save ar.lc
;;
.body
mov ar.lc=r8
;;
.loop: fc in0 // issuable on M0 only
add in0=32,in0
br.cloop.sptk.few .loop
;;
sync.i
;;
srlz.i
;;
mov ar.lc=r3 // restore ar.lc
br.ret.sptk.many rp
.endp flush_cache
#elif defined(__i386__) || defined (__x86_64__)
.globl flush_cache
flush_cache:
ret
#elif defined(__hppa__)
# warning FIX ME!!
.globl flush_cache
flush_cache:
.proc
.callinfo
bv %r0(%rp)
.procend
#elif defined(__powerpc64__)
# warning IMPLEMENT ME FOR PPC64!!
.globl flush_cache
flush_cache:
lwz 11, 0(1) ;
lwz 0, 4(11) ;
mtlr 0 ;
lwz 31, -4(11) ;
mr 1, 11 ;
blr
#elif defined(__powerpc__)
# warning IMPLEMENT ME FOR PPC32!!
.globl flush_cache
flush_cache:
lwz 11, 0(1) ;
lwz 0, 4(11) ;
mtlr 0 ;
lwz 31, -4(11) ;
mr 1, 11 ;
blr
#elif defined(__arm__)
.text
.globl flush_cache
flush_cache:
bx lr
#else
# error Need flush_cache code for this architecture.
#endif
#if defined ( __linux__) && !defined (__arm__)
/* We do not need executable stack. */
.section .note.GNU-stack,"",@progbits
#endif