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b4d191544a
(Logical change 1.19)
26 lines
853 B
Text
26 lines
853 B
Text
- what's the byte-order of [gs]et_{fp,}reg?
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- locking
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- memory allocation
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- unify UNW_IA64_AR_BSP and UNW_IA64_BSP
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- finish & test unwinding across signal frame (pay attention that signal
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frame gets updated)
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- API for dynamically generated code and redirection
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- to test:
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o verify correctness of spill-area layout
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o verify working of frgr_mem descriptor (especially for f16-f31)
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+ multi-architecture support?
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+ debuggers need additional frame info:
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- ability to determine first non-prologue instruction
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(gdb calls this skip_prologue) => this doesn't really
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make much sense for optimized code: there may be now
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single IP at which the .body starts; the gdb maintainers
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are aware of this and are planning to modify gdb such that
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skip_prologue can always return 0
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- ability to find out whether and where a frame saved a register
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