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173 lines
5 KiB
ArmAsm
173 lines
5 KiB
ArmAsm
/* libunwind - a platform-independent unwind library
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Copyright (C) 2004 Hewlett-Packard Co
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Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
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This file is part of libunwind.
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Permission is hereby granted, free of charge, to any person obtaining
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a copy of this software and associated documentation files (the
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"Software"), to deal in the Software without restriction, including
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without limitation the rights to use, copy, modify, merge, publish,
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distribute, sublicense, and/or sell copies of the Software, and to
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permit persons to whom the Software is furnished to do so, subject to
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the following conditions:
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The above copyright notice and this permission notice shall be
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included in all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
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LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
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OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
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WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */
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#include "ucontext_i.h"
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#define GR(n) (SC_GR + (n)*8)
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#define BR(n) (SC_BR + (n)*8)
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#define FR(n) (SC_FR + (n)*16)
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/* This should be compatible to the libc's getcontext(), except that
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the sc->sc_mask field is always cleared and that the name is
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prefixed with _Uia64_ so we don't step on the application's
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name-space. */
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.align 32
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.protected _Uia64_getcontext
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.global _Uia64_getcontext
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.proc _Uia64_getcontext
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_Uia64_getcontext:
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.prologue
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alloc rPFS = ar.pfs, 1, 0, 0, 0 // M2
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mov rPR = pr // I0, 2 cycles
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add r2 = GR(1), in0 // I1
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;;
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.save ar.unat, rUNAT
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mov.m rUNAT = ar.unat // M2, 5 cycles
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.body
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st8.spill [r2] = r1, (SC_FLAGS - GR(1)) // M3
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dep.z rFLAGS = -1, IA64_SC_FLAG_SYNCHRONOUS_BIT, 1 // I0, 1 cycle
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;;
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mov.m rRSC = ar.rsc // M2, 12 cyc.
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st8 [r2] = rFLAGS, (SC_PR - SC_FLAGS) // M3
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add r3 = FR(2), in0
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;;
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mov.m rBSP = ar.bsp // M2, 12 cyc.
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st8 [r2] = rPR, (GR(12) - SC_PR) // M3
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add r8 = FR(16), in0
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;;
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mov.m rFPSR = ar.fpsr // M2, 12 cyc.
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st8.spill [r2] = r12, (GR(4) - GR(12)) // M3
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add r9 = FR(24), in0
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;;
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stf.spill [r3] = f2 // M2
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stf.spill [r8] = f16 // M3
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add r3 = GR(7), in0
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;;
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flushrs // M0
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stf.spill [r9] = f24, (FR(31) - FR(24)) // M2
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mov rB0 = b0 // I0, 2 cycles
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;;
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stf.spill [r9] = f31 // M2
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st8.spill [r2] = r4, (GR(5) - GR(4)) // M3, bank 1
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mov rB1 = b1 // I0, 2 cycles
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;;
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.mem.offset 0,0; st8.spill [r2] = r5, (GR(6) - GR(5)) // M4, bank 0
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.mem.offset 8,0; st8.spill [r3] = r7, (BR(0) - GR(7)) // M3, bank 0
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mov rB2 = b2 // I0, 2 cycles
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;;
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st8.spill [r2] = r6, (BR(1) - GR(6)) // M2, bank 1
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st8 [r3] = rB0, (BR(4) - BR(0)) // M3, bank 1
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mov rB4 = b4 // I0, 2 cycles
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;;
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mov.m rNAT = ar.unat // M2, 5 cycles
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st8 [r2] = rB1, (BR(2) - BR(1)) // M3, bank 0
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mov rB3 = b3
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;;
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st8 [r2] = rB2, (BR(3) - BR(2)) // M2, bank 1
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st8 [r3] = rB4, (SC_LC - BR(4)) // M3, bank 1
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mov rB5 = b5 // I0, 2 cycles
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;;
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and rTMP = ~0x3, rRSC // M0
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add rPOS = GR(0), in0 // rPOS <- &sc_gr[0] // M1
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mov.i rLC = ar.lc // I0, 2 cycles
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;;
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mov.m ar.rsc = rTMP // put RSE into lazy mode // M2, ? cycles
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st8 [r2] = rB3, (BR(5) - BR(3)) // M3, bank 0
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extr.u rPOS = rPOS, 3, 6 // get NaT bitnr for r0 // I0
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;;
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mov.m rRNAT = ar.rnat // M2, 5 cycles
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st8 [r2] = rB5, (SC_PFS - BR(5)) // M3, bank 0
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sub rCPOS = 64, rPOS // I0
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;;
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st8 [r2] = rPFS, (SC_UNAT - SC_PFS) // M2
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st8 [r3] = rLC, (SC_BSP - SC_LC) // M3
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shr.u rTMP = rNAT, rPOS // I0, 3 cycles
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;;
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st8 [r2] = rUNAT, (SC_FPSR - SC_UNAT) // M2
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st8 [r3] = rBSP // M3
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add r8 = FR(3), in0
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;;
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st8 [r2] = rFPSR, (SC_RNAT - SC_FPSR) // M2
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stf.spill [r8] = f3, (FR(4) - FR(3)) // M3
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add r9 = FR(5), in0
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;;
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stf.spill [r8] = f4, (FR(17) - FR(4)) // M2
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stf.spill [r9] = f5, (FR(19) - FR(5)) // M3
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shl rNAT = rNAT, rCPOS // I0, 3 cycles
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;;
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st8 [r2] = rRNAT, (SC_NAT - SC_RNAT) // M2
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stf.spill [r8] = f17, (FR(18) - FR(17)) // M3
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nop.i 0
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;;
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stf.spill [r8] = f18, (FR(20) - FR(18)) // M2
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stf.spill [r9] = f19, (FR(21) - FR(19)) // M3
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nop.i 0
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;;
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stf.spill [r8] = f20, (FR(22) - FR(20)) // M2
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stf.spill [r9] = f21, (FR(23) - FR(21)) // M3
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or rNAT = rNAT, rTMP // I0
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;;
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st8 [r2] = rNAT // M2
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stf.spill [r8] = f22, (FR(25) - FR(22)) // M3
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;;
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stf.spill [r9] = f23, (FR(26) - FR(23)) // M2
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stf.spill [r8] = f25, (FR(27) - FR(25)) // M3
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;;
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stf.spill [r9] = f26, (FR(28) - FR(26)) // M2
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stf.spill [r8] = f27, (FR(29) - FR(27)) // M3
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;;
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mov.m ar.rsc = rRSC // restore RSE mode // M2
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stf.spill [r9] = f28, (FR(30) - FR(28)) // M3
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;;
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mov.m ar.unat = rUNAT // restore caller's UNaT // M2
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stf.spill [r8] = f29 // M3
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;;
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stf.spill [r9] = f30 // M2
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mov r8 = 0
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br.ret.sptk.many rp
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.endp _Uia64_getcontext
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