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(unw_get_save_loc): First draft-implementation. Should be reasonably close to something
useful. (Logical change 1.10)
This commit is contained in:
hp.com!davidm
parent
a5bf714ea5
commit
fb94137d04
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@ -1,19 +1,155 @@
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int
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unw_get_save_loc (unw_cursor_t *cursor, int regnum, unw_save_loc_t *loc)
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{
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#ifdef UNW_LOCAL_ONLY
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unw_word_t addr;
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#include <assert.h>
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YYY; this is wrong: need to consider cursor save locs first; YYY
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loc->type = UNW_SLT_NONE;
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addr = uc_addr (c->uc, regnum);
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if (addr)
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#include "offsets.h"
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#include "regs.h"
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#include "rse.h"
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int
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unw_get_save_loc (unw_cursor_t *cursor, int reg, unw_save_loc_t *sloc)
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{
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struct ia64_cursor *c = (struct ia64_cursor *) cursor;
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unw_word_t loc, reg_loc, nat_loc, sc_addr;
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int ret;
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loc = 0; /* default to "not saved" */
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switch (reg)
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{
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loc->type = UNW_SLT_MEMORY;
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loc->addr = addr;
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}
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/* frame registers */
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case UNW_IA64_BSP:
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case UNW_REG_SP:
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case UNW_REG_PROC_START:
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case UNW_REG_HANDLER:
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case UNW_REG_LSDA:
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default:
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break;
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case UNW_REG_IP:
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loc = c->ip_loc;
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break;
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/* preserved registers: */
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case UNW_IA64_GR + 4 ... UNW_IA64_GR + 7:
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loc = (&c->r4_loc)[reg - (UNW_IA64_GR + 4)];
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break;
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case UNW_IA64_NAT + 4 ... UNW_IA64_NAT + 7:
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loc = (&c->nat4_loc)[reg - (UNW_IA64_NAT + 4)];
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reg_loc = (&c->r4_loc)[reg - (UNW_IA64_NAT + 4)];
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if (IA64_IS_FP_LOC (reg_loc))
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/* NaT bit saved as a NaTVal. */
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loc = reg_loc;
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else if (IA64_IS_MEMSTK_NAT (loc))
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loc = IA64_GET_LOC (loc) << 3;
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else
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{
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reg = IA64_GET_LOC (loc);
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assert (reg >= 0 && reg < 128);
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if (!reg)
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loc = 0;
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else if (reg >= 4 && reg <= 7)
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{
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#ifdef UNW_LOCAL_ONLY
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loc = c->uc->uc_mcontext.sc_nat;
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#else
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XXX;
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loc = IA64_REG_LOC (c, UNW_IA64_NAT + reg);
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#endif
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}
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else if (reg >= 32)
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{
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loc = ia64_rse_rnat_addr (reg_loc); /* XXX looks wrong */
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if (nat_loc >= c->rbs_top)
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nat_loc = c->top_rnat_loc;
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}
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else if (c->pi.flags & IA64_FLAG_SIGTRAMP)
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{
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/* NaT bit is saved in a sigcontext. */
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ret = ia64_get (c, c->sp + 0x10 + SIGFRAME_ARG2_OFF, &sc_addr);
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if (ret < 0)
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return ret;
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loc = sc_addr + SIGCONTEXT_NAT_OFF;
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}
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}
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break;
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case UNW_IA64_AR_BSP: loc = c->bsp_loc; break;
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case UNW_IA64_AR_BSPSTORE: loc = c->bspstore_loc; break;
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case UNW_IA64_AR_PFS: loc = c->pfs_loc; break;
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case UNW_IA64_AR_RNAT: loc = c->rnat_loc; break;
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case UNW_IA64_AR_UNAT: loc = c->unat_loc; break;
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case UNW_IA64_AR_LC: loc = c->lc_loc; break;
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case UNW_IA64_AR_FPSR: loc = c->fpsr_loc; break;
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case UNW_IA64_BR + 1: loc = c->b1_loc; break;
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case UNW_IA64_BR + 2: loc = c->b2_loc; break;
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case UNW_IA64_BR + 3: loc = c->b3_loc; break;
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case UNW_IA64_BR + 4: loc = c->b4_loc; break;
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case UNW_IA64_BR + 5: loc = c->b5_loc; break;
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case UNW_IA64_CFM: loc = c->cfm_loc; break;
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case UNW_IA64_PR: loc = c->pr_loc; break;
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break;
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case UNW_IA64_GR + 32 ... UNW_IA64_GR + 127: /* stacked reg */
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reg = rotate_gr (c, reg - UNW_IA64_GR) + UNW_IA64_GR;
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loc = ia64_rse_skip_regs (c->bsp, reg - (UNW_IA64_GR + 32));
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break;
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case UNW_IA64_NAT + 32 ... UNW_IA64_NAT + 127: /* stacked reg */
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reg = rotate_gr (c, reg - UNW_IA64_NAT) + UNW_IA64_NAT;
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loc = ia64_rse_skip_regs (c->bsp, reg - (UNW_IA64_NAT + 32));
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loc = ia64_rse_rnat_addr (loc);
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if (loc > c->rbs_top)
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loc = c->top_rnat_loc;
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break;
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case UNW_IA64_AR_EC:
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loc = c->cfm_loc;
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break;
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/* scratch & special registers: */
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case UNW_IA64_GR + 0:
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case UNW_IA64_GR + 1: /* global pointer */
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case UNW_IA64_NAT + 0:
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case UNW_IA64_NAT + 1: /* global pointer */
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break;
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case UNW_IA64_NAT + 2 ... UNW_IA64_NAT + 3:
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case UNW_IA64_NAT + 8 ... UNW_IA64_NAT + 31:
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loc = ia64_scratch_loc (c, reg);
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break;
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case UNW_IA64_GR + 2 ... UNW_IA64_GR + 3:
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case UNW_IA64_GR + 8 ... UNW_IA64_GR + 31:
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case UNW_IA64_BR + 0:
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case UNW_IA64_BR + 7:
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case UNW_IA64_AR_RSC:
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case UNW_IA64_AR_25:
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case UNW_IA64_AR_26:
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case UNW_IA64_AR_CCV:
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loc = ia64_scratch_loc (c, reg);
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break;
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}
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memset (sloc, 0, sizeof (sloc));
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if (!sloc)
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{
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sloc->type = UNW_SLT_NONE;
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return 0;
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}
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#if !defined(UNW_LOCAL_ONLY)
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if (IA64_IS_REG_LOC (loc))
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{
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sloc->type = UNW_SLT_REG;
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sloc->u.regnum = IA64_GET_LOC (loc);
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}
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else
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#endif
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{
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sloc->type = UNW_SLT_MEMORY;
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sloc->u.addr = loc;
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}
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return 0;
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}
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