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(Logical change 1.11)
This commit is contained in:
mostang.com!davidm 2002-04-04 19:04:09 +00:00
parent fb9b517d0c
commit f8cdbb6ef0

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@ -1,6 +1,19 @@
- what's the byte-order of [gs]et_{fp,}reg?
- multi-architecture support?
- locking
- memory allocation
- unify UNW_IA64_AR_BSP and UNW_IA64_BSP - unify UNW_IA64_AR_BSP and UNW_IA64_BSP
- debuggers need additional frame info: - finish & test unwinding across signal frame (pay attention that signal
frame gets updated)
- API for dynamically generated code and redirection
+ debuggers need additional frame info:
- ability to determine first non-prologue instruction - ability to determine first non-prologue instruction
(gdb calls this skip_prologue) => this doesn't really (gdb calls this skip_prologue) => this doesn't really
make much sense for optimized code: there may be now make much sense for optimized code: there may be now
@ -8,6 +21,3 @@
are aware of this and are planning to modify gdb such that are aware of this and are planning to modify gdb such that
skip_prologue can always return 0 skip_prologue can always return 0
- ability to find out whether and where a frame saved a register - ability to find out whether and where a frame saved a register
- finish & test unwinding across signal frame (pay attention that signal
frame gets updated)