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Adjust for fact that IA64_REG_LOC now takes two arguments.
Special case access of NaT bits. (Logical change 1.8)
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1 changed files with 8 additions and 4 deletions
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@ -68,7 +68,7 @@ ia64_scratch_loc (struct ia64_cursor *c, unw_regnum_t reg)
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return loc;
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return loc;
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}
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}
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else
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else
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return IA64_REG_LOC (reg);
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return IA64_REG_LOC (c, reg);
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}
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}
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/* Apply rotation to a general register. The number REG must be in
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/* Apply rotation to a general register. The number REG must be in
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@ -274,11 +274,16 @@ access_nat (struct ia64_cursor *c, unw_word_t loc, unw_word_t reg_loc,
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/* NaT bit is saved in a NaT register. This happens when a
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/* NaT bit is saved in a NaT register. This happens when a
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general register is saved to another general
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general register is saved to another general
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register. */
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register. */
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#ifdef UNW_LOCAL_ONLY
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mask = ((unw_word_t) 1) << reg;
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nat_loc = (unw_word_t) &c->uc->uc_mcontext.sc_nat;
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#else
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if (write)
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if (write)
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ret = ia64_put (c, UNW_IA64_NAT + reg, *valp);
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ret = ia64_put (c, IA64_REG_LOC (c, UNW_IA64_NAT + reg), *valp);
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else
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else
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ret = ia64_get (c, UNW_IA64_NAT + reg, valp);
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ret = ia64_get (c, IA64_REG_LOC (c, UNW_IA64_NAT + reg), valp);
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return ret;
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return ret;
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#endif
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}
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}
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else if (reg >= 32)
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else if (reg >= 32)
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{
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{
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@ -371,7 +376,6 @@ ia64_access_reg (struct ia64_cursor *c, unw_regnum_t reg, unw_word_t *valp,
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reg_loc = (&c->r4_loc)[reg - (UNW_IA64_NAT + 4)];
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reg_loc = (&c->r4_loc)[reg - (UNW_IA64_NAT + 4)];
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return access_nat (c, loc, reg_loc, valp, write);
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return access_nat (c, loc, reg_loc, valp, write);
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case UNW_IA64_AR_BSP: loc = c->bsp_loc; break;
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case UNW_IA64_AR_BSP: loc = c->bsp_loc; break;
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case UNW_IA64_AR_BSPSTORE: loc = c->bspstore_loc; break;
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case UNW_IA64_AR_BSPSTORE: loc = c->bspstore_loc; break;
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case UNW_IA64_AR_PFS: loc = c->pfs_loc; break;
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case UNW_IA64_AR_PFS: loc = c->pfs_loc; break;
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