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(get_rnat): Simplify to return only the RNaT value itself.
(rbs_cover_and_flush): Take additional arguments "dirty_partition", "dirty_rnat", and "bspstore". When it is necessary to copy backing-store words, copy them to "dirty_partition" instead of the target rbs, which may be full already. (Logical change 1.259)
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hp.com!davidm
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commit
cd69bfec0c
1 changed files with 114 additions and 91 deletions
205
src/ia64/Grbs.c
205
src/ia64/Grbs.c
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@ -133,123 +133,146 @@ rbs_find_stacked (struct cursor *c, unw_word_t regs_to_skip,
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}
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}
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#ifndef REMOTE_ONLY
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static inline int
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get_rnat (struct cursor *c, struct rbs_area *rbs, unw_word_t bsp,
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ia64_loc_t *__restrict rnat_locp, unw_word_t *__restrict rnatp)
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unw_word_t *__restrict rnatp)
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{
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*rnat_locp = rbs_get_rnat_loc (rbs, bsp);
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return ia64_get (c, *rnat_locp, rnatp);
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ia64_loc_t rnat_locp = rbs_get_rnat_loc (rbs, bsp);
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return ia64_get (c, rnat_locp, rnatp);
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}
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/* Ensure that the first "nregs" stacked registers are on the current
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register backing store area. This effectively simulates the effect
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of a "cover" followed by a "flushrs" for the current frame.
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/* Simulate the effect of "cover" followed by a "flushrs" for the
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target-frame. However, since the target-frame's backing store
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may not have space for the registers that got spilled onto other
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rbs-areas, we save those registers to DIRTY_PARTITION where
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we can then load them via a single "loadrs".
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This function returns the size of the dirty-partition that was
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created or a negative error-code in case of error.
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Note: This does not modify the rbs_area[] structure in any way. */
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HIDDEN int
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rbs_cover_and_flush (struct cursor *c, unw_word_t nregs)
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rbs_cover_and_flush (struct cursor *c, unw_word_t nregs,
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unw_word_t *dirty_partition, unw_word_t *dirty_rnat,
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unw_word_t *bspstore)
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{
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unw_word_t src_mask, dst_mask, curr, val, left_edge = c->rbs_left_edge;
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unw_word_t src_bsp, dst_bsp, src_rnat, dst_rnat, dst_rnat_addr;
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ia64_loc_t src_rnat_loc, dst_rnat_loc;
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unw_word_t final_bsp;
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struct rbs_area *dst_rbs;
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unw_word_t n, src_mask, dst_mask, bsp, *dst, src_rnat, dst_rnat = 0;
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unw_word_t curr = c->rbs_curr, left_edge = c->rbs_left_edge;
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struct rbs_area *rbs = c->rbs_area + curr;
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int ret;
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if (nregs < 1)
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return 0; /* nothing to do... */
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bsp = c->bsp;
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c->bsp = ia64_rse_skip_regs (bsp, nregs);
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/* Handle the common case quickly: */
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curr = c->rbs_curr;
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dst_rbs = c->rbs_area + curr;
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final_bsp = ia64_rse_skip_regs (c->bsp, nregs); /* final bsp */
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if (likely (rbs_contains (dst_rbs, final_bsp) || curr == left_edge))
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if (likely (rbs_contains (rbs, bsp)))
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{
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dst_rnat_addr = ia64_rse_rnat_addr (ia64_rse_skip_regs (c->bsp,
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nregs - 1));
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if (rbs_contains (dst_rbs, dst_rnat_addr))
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c->loc[IA64_REG_RNAT] = rbs_loc (dst_rbs, dst_rnat_addr);
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c->bsp = final_bsp;
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return 0;
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}
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/* Skip over regs that are already on the destination rbs-area: */
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dst_bsp = src_bsp = dst_rbs->end;
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if ((ret = get_rnat (c, dst_rbs, dst_bsp, &dst_rnat_loc, &dst_rnat)) < 0)
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return ret;
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/* This may seem a bit surprising, but with a hyper-lazy RSE, it's
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perfectly common that ar.bspstore points to an RNaT slot at the
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time of a backing-store switch. When that happens, install the
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appropriate RNaT value (if necessary) and move on to the next
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slot. */
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if (ia64_rse_is_rnat_slot (dst_bsp))
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{
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if ((IA64_IS_REG_LOC (dst_rnat_loc)
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|| IA64_GET_ADDR (dst_rnat_loc) != dst_bsp)
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&& (ret = ia64_put (c, rbs_loc (dst_rbs, dst_bsp), dst_rnat)) < 0)
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return ret;
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dst_bsp = src_bsp = dst_bsp + 8;
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}
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while (dst_bsp != final_bsp)
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{
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while (!rbs_contains (&c->rbs_area[curr], src_bsp))
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/* at least _some_ registers are on rbs... */
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n = ia64_rse_num_regs (bsp, rbs->end);
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if (likely (n >= nregs))
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{
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/* switch to next rbs-area, adjust src_bsp accordingly: */
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if (curr == left_edge)
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/* common case #1: all registers are on current rbs... */
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/* got lucky: _all_ registers are on rbs... */
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ia64_loc_t rnat_loc = rbs_get_rnat_loc (rbs, c->bsp);
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*bspstore = c->bsp;
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if (IA64_IS_REG_LOC (rnat_loc))
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{
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Debug (1, "rbs-underflow while flushing %lu regs, "
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"src_bsp=0x%lx, dst_bsp=0x%lx\n", (unsigned long) nregs,
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(unsigned long) src_bsp, (unsigned long) dst_bsp);
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return -UNW_EBADREG;
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unw_word_t rnat_addr = (unw_word_t)
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tdep_uc_addr (c->as_arg, UNW_IA64_AR_RNAT, NULL);
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rnat_loc = IA64_LOC_ADDR (rnat_addr, 0);
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}
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curr = (curr + NELEMS (c->rbs_area) - 1) % NELEMS (c->rbs_area);
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src_bsp = c->rbs_area[curr].end - c->rbs_area[curr].size;
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c->loc[IA64_REG_RNAT] = rnat_loc;
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return 0; /* all done */
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}
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nregs -= n; /* account for registers already on the rbs */
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assert (ia64_rse_skip_regs (c->bsp, -nregs) ==
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ia64_rse_skip_regs (rbs->end, 0));
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}
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else
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/* Earlier frames also didn't get spilled; need to "loadrs" those,
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too... */
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nregs += ia64_rse_num_regs (rbs->end, bsp);
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/* OK, we need to copy NREGS registers to the dirty partition. */
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*bspstore = bsp = rbs->end;
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c->loc[IA64_REG_RNAT] = rbs->rnat_loc;
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assert (!IA64_IS_REG_LOC (rbs->rnat_loc));
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dst = dirty_partition;
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while (nregs > 0)
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{
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if (unlikely (!rbs_contains (rbs, bsp)))
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{
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/* switch to next non-empty rbs-area: */
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do
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{
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if (curr == left_edge)
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{
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Debug (0, "rbs-underflow while flushing %lu regs, "
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"bsp=0x%lx, dst=0x%p\n", (unsigned long) nregs,
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(unsigned long) bsp, dst);
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return -UNW_EBADREG;
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}
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assert (ia64_rse_num_regs (rbs->end, bsp) == 0);
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curr = (curr + NELEMS (c->rbs_area) - 1) % NELEMS (c->rbs_area);
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rbs = c->rbs_area + curr;
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bsp = rbs->end - rbs->size;
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}
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while (rbs->size == 0);
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if ((ret = get_rnat (c, rbs, bsp, &src_rnat)) < 0)
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return ret;
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}
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/* OK, found the right rbs-area. Now copy both the register
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value and its NaT bit: */
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if (unlikely (ia64_rse_is_rnat_slot (bsp)))
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{
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bsp += 8;
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if ((ret = get_rnat (c, rbs, bsp, &src_rnat)) < 0)
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return ret;
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}
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if (unlikely (ia64_rse_is_rnat_slot ((unw_word_t) dst)))
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{
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*dst++ = dst_rnat;
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dst_rnat = 0;
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}
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if ((ret = get_rnat (c, c->rbs_area + curr, src_bsp,
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&src_rnat_loc, &src_rnat)) < 0)
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return ret;
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src_mask = ((unw_word_t) 1) << ia64_rse_slot_num (src_bsp);
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dst_mask = ((unw_word_t) 1) << ia64_rse_slot_num (dst_bsp);
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src_mask = ((unw_word_t) 1) << ia64_rse_slot_num (bsp);
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dst_mask = ((unw_word_t) 1) << ia64_rse_slot_num ((unw_word_t) dst);
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if (src_rnat & src_mask)
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dst_rnat |= dst_mask;
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else
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dst_rnat &= ~dst_mask;
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if ((ret = ia64_get (c, rbs_loc (c->rbs_area + curr, src_bsp), &val)) < 0
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|| (ret = ia64_put (c, rbs_loc (dst_rbs, dst_bsp), val)) < 0)
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/* copy one slot: */
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if ((ret = ia64_get (c, rbs_loc (rbs, bsp), dst)) < 0)
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return ret;
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/* advance src_bsp & dst_bsp to next slot: */
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src_bsp += 8;
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if (ia64_rse_is_rnat_slot (src_bsp))
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src_bsp += 8;
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dst_bsp += 8;
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if (ia64_rse_is_rnat_slot (dst_bsp))
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{
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if ((ret = ia64_put (c, rbs_loc (dst_rbs, dst_bsp), dst_rnat)) < 0)
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return ret;
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dst_bsp += 8;
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if ((ret = get_rnat (c, dst_rbs, dst_bsp,
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&dst_rnat_loc, &dst_rnat)) < 0)
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return ret;
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}
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/* advance to next slot: */
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--nregs;
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bsp += 8;
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++dst;
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}
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c->bsp = dst_bsp;
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c->loc[IA64_REG_RNAT] = dst_rnat_loc;
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return ia64_put (c, dst_rnat_loc, dst_rnat);
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if (unlikely (ia64_rse_is_rnat_slot ((unw_word_t) dst)))
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{
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/* The LOADRS instruction loads "the N bytes below the current
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BSP" but BSP can never point to an RNaT slot so if the last
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destination word happens to be an RNaT slot, we need to write
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that slot now. */
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*dst++ = dst_rnat;
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dst_rnat = 0;
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}
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*dirty_rnat = dst_rnat;
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return (char *) dst - (char *) dirty_partition;
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}
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#endif /* !REMOTE_ONLY */
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