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Fix signed/unsigned comparisons.

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(Logical change 1.45)
This commit is contained in:
mostang.com!davidm 2003-02-08 10:10:59 +00:00
parent 12d13835f9
commit b2a5a9023b
5 changed files with 12 additions and 11 deletions
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4
src/_UPT_access_fpreg.c
View file

@ -39,7 +39,7 @@ _UPT_access_fpreg (unw_addr_space_t as, unw_regnum_t reg, unw_fpreg_t *val,
errno = 0; errno = 0;
if (write) if (write)
for (i = 0; i < sizeof (*val) / sizeof (wp[i]); ++i) for (i = 0; i < (int) (sizeof (*val) / sizeof (wp[i])); ++i)
{ {
ptrace (PTRACE_POKEUSER, pid, _UPT_reg_offset[reg] + i * sizeof(wp[i]), ptrace (PTRACE_POKEUSER, pid, _UPT_reg_offset[reg] + i * sizeof(wp[i]),
wp[i]); wp[i]);
@ -47,7 +47,7 @@ _UPT_access_fpreg (unw_addr_space_t as, unw_regnum_t reg, unw_fpreg_t *val,
return -UNW_EBADREG; return -UNW_EBADREG;
} }
else else
for (i = 0; i < sizeof (*val) / sizeof (wp[i]); ++i) for (i = 0; i < (int) (sizeof (*val) / sizeof (wp[i])); ++i)
{ {
wp[i] = ptrace (PTRACE_PEEKUSER, pid, wp[i] = ptrace (PTRACE_PEEKUSER, pid,
_UPT_reg_offset[reg] + i * sizeof(wp[i]), 0); _UPT_reg_offset[reg] + i * sizeof(wp[i]), 0);

7
src/ia64/Gparser-ia64.c
View file

@ -210,7 +210,7 @@ finish_prologue (struct ia64_state_record *sr)
/* First, resolve implicit register save locations (see Section /* First, resolve implicit register save locations (see Section
"11.4.2.3 Rules for Using Unwind Descriptors", rule 3). */ "11.4.2.3 Rules for Using Unwind Descriptors", rule 3). */
for (i = 0; i < NELEMS (unw.save_order); ++i) for (i = 0; i < (int) NELEMS (unw.save_order); ++i)
{ {
reg = sr->curr.reg + unw.save_order[i]; reg = sr->curr.reg + unw.save_order[i];
if (reg->where == IA64_WHERE_GR_SAVE) if (reg->where == IA64_WHERE_GR_SAVE)
@ -238,7 +238,7 @@ finish_prologue (struct ia64_state_record *sr)
regs[1] = sr->curr.reg + IA64_REG_R4; regs[1] = sr->curr.reg + IA64_REG_R4;
regs[2] = sr->curr.reg + IA64_REG_B1; regs[2] = sr->curr.reg + IA64_REG_B1;
for (t = 0; t < sr->region_len; ++t) for (t = 0; (int) t < sr->region_len; ++t)
{ {
if ((t & 3) == 0) if ((t & 3) == 0)
mask = *cp++; mask = *cp++;
@ -920,7 +920,8 @@ create_state_record_for (struct cursor *c, struct ia64_state_record *sr,
{ {
/* No info, return default unwinder (leaf proc, no mem stack, no /* No info, return default unwinder (leaf proc, no mem stack, no
saved regs), rp in b0, pfs in ar.pfs. */ saved regs), rp in b0, pfs in ar.pfs. */
dprintf ("unwind.parser: no unwind info for ip=0x%lx\n", (long) ip); dprintf ("unwind.parser: no unwind info for ip=0x%lx (gp=%lx)\n",
(long) ip, (long) c->pi.gp);
sr->curr.reg[IA64_REG_RP].where = IA64_WHERE_BR; sr->curr.reg[IA64_REG_RP].where = IA64_WHERE_BR;
sr->curr.reg[IA64_REG_RP].when = -1; sr->curr.reg[IA64_REG_RP].when = -1;
sr->curr.reg[IA64_REG_RP].val = 0; sr->curr.reg[IA64_REG_RP].val = 0;

2
src/ia64/regname-ia64.c
View file

@ -116,7 +116,7 @@ static const char *regname[] =
const char * const char *
unw_regname (unw_regnum_t reg) unw_regname (unw_regnum_t reg)
{ {
if (reg < NELEMS (regname)) if (reg < (unw_regnum_t) NELEMS (regname))
return regname[reg]; return regname[reg];
else else
return "???"; return "???";

6
src/ia64/regs.h
View file

@ -14,13 +14,13 @@ rotate_gr (struct cursor *c, int reg)
rrb_gr = (c->cfm >> 18) & 0x7f; rrb_gr = (c->cfm >> 18) & 0x7f;
if ((unsigned) (reg - 32) > sof) if ((unsigned) (reg - 32) > sof)
return reg; /* not a valid stacked register: just return original value */ return reg; /* not a valid stacked register: just return original value */
else if ((unsigned) (reg - 32) > sor) else if ((unsigned) (reg - 32) > sor)
preg = reg; /* register not part of the rotating partition */ preg = reg; /* register not part of the rotating partition */
else else
{ {
preg = reg + rrb_gr; /* apply rotation */ preg = reg + rrb_gr; /* apply rotation */
if (preg > 32 + sor) if (preg > 32 + (int) sor)
preg -= sor; /* wrap around */ preg -= sor; /* wrap around */
} }
debug (100, "%s: sor=%u rrb.gr=%u, r%d -> r%d\n", debug (100, "%s: sor=%u rrb.gr=%u, r%d -> r%d\n",

4
tests/ia64-test-stack.c
View file

@ -106,13 +106,13 @@ do_unwind_tests (void)
if ((ret = unw_get_reg (&c, UNW_IA64_CFM, &cfm)) < 0) if ((ret = unw_get_reg (&c, UNW_IA64_CFM, &cfm)) < 0)
break; break;
sof = cfm & 0x7f; sof = cfm & 0x7f;
if (sof != (i & 1)) if (sof != (unw_word_t) (i & 1))
panic ("\texpected sof=%d, found sof=%lu\n", i - 1, sof); panic ("\texpected sof=%d, found sof=%lu\n", i - 1, sof);
if (sof == 1) if (sof == 1)
{ {
if ((ret = unw_get_reg (&c, UNW_IA64_GR + 32, &r32)) < 0) if ((ret = unw_get_reg (&c, UNW_IA64_GR + 32, &r32)) < 0)
break; break;
if (r32 != i - 1) if (r32 != (unw_word_t) (i - 1))
panic ("\texpected r32=%d, found r32=%lu\n", i - 1, r32); panic ("\texpected r32=%d, found r32=%lu\n", i - 1, r32);
} }
} }