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https://github.com/tobast/libunwind-eh_elf.git
synced 2024-11-26 17:17:39 +01:00
Fix signed/unsigned comparisons.
(Logical change 1.45)
This commit is contained in:
parent
12d13835f9
commit
b2a5a9023b
5 changed files with 12 additions and 11 deletions
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@ -39,7 +39,7 @@ _UPT_access_fpreg (unw_addr_space_t as, unw_regnum_t reg, unw_fpreg_t *val,
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errno = 0;
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errno = 0;
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if (write)
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if (write)
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for (i = 0; i < sizeof (*val) / sizeof (wp[i]); ++i)
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for (i = 0; i < (int) (sizeof (*val) / sizeof (wp[i])); ++i)
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{
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{
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ptrace (PTRACE_POKEUSER, pid, _UPT_reg_offset[reg] + i * sizeof(wp[i]),
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ptrace (PTRACE_POKEUSER, pid, _UPT_reg_offset[reg] + i * sizeof(wp[i]),
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wp[i]);
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wp[i]);
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@ -47,7 +47,7 @@ _UPT_access_fpreg (unw_addr_space_t as, unw_regnum_t reg, unw_fpreg_t *val,
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return -UNW_EBADREG;
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return -UNW_EBADREG;
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}
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}
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else
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else
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for (i = 0; i < sizeof (*val) / sizeof (wp[i]); ++i)
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for (i = 0; i < (int) (sizeof (*val) / sizeof (wp[i])); ++i)
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{
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{
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wp[i] = ptrace (PTRACE_PEEKUSER, pid,
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wp[i] = ptrace (PTRACE_PEEKUSER, pid,
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_UPT_reg_offset[reg] + i * sizeof(wp[i]), 0);
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_UPT_reg_offset[reg] + i * sizeof(wp[i]), 0);
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@ -210,7 +210,7 @@ finish_prologue (struct ia64_state_record *sr)
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/* First, resolve implicit register save locations (see Section
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/* First, resolve implicit register save locations (see Section
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"11.4.2.3 Rules for Using Unwind Descriptors", rule 3). */
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"11.4.2.3 Rules for Using Unwind Descriptors", rule 3). */
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for (i = 0; i < NELEMS (unw.save_order); ++i)
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for (i = 0; i < (int) NELEMS (unw.save_order); ++i)
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{
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{
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reg = sr->curr.reg + unw.save_order[i];
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reg = sr->curr.reg + unw.save_order[i];
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if (reg->where == IA64_WHERE_GR_SAVE)
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if (reg->where == IA64_WHERE_GR_SAVE)
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@ -238,7 +238,7 @@ finish_prologue (struct ia64_state_record *sr)
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regs[1] = sr->curr.reg + IA64_REG_R4;
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regs[1] = sr->curr.reg + IA64_REG_R4;
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regs[2] = sr->curr.reg + IA64_REG_B1;
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regs[2] = sr->curr.reg + IA64_REG_B1;
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for (t = 0; t < sr->region_len; ++t)
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for (t = 0; (int) t < sr->region_len; ++t)
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{
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{
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if ((t & 3) == 0)
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if ((t & 3) == 0)
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mask = *cp++;
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mask = *cp++;
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@ -920,7 +920,8 @@ create_state_record_for (struct cursor *c, struct ia64_state_record *sr,
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{
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{
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/* No info, return default unwinder (leaf proc, no mem stack, no
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/* No info, return default unwinder (leaf proc, no mem stack, no
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saved regs), rp in b0, pfs in ar.pfs. */
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saved regs), rp in b0, pfs in ar.pfs. */
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dprintf ("unwind.parser: no unwind info for ip=0x%lx\n", (long) ip);
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dprintf ("unwind.parser: no unwind info for ip=0x%lx (gp=%lx)\n",
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(long) ip, (long) c->pi.gp);
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sr->curr.reg[IA64_REG_RP].where = IA64_WHERE_BR;
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sr->curr.reg[IA64_REG_RP].where = IA64_WHERE_BR;
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sr->curr.reg[IA64_REG_RP].when = -1;
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sr->curr.reg[IA64_REG_RP].when = -1;
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sr->curr.reg[IA64_REG_RP].val = 0;
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sr->curr.reg[IA64_REG_RP].val = 0;
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@ -116,7 +116,7 @@ static const char *regname[] =
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const char *
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const char *
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unw_regname (unw_regnum_t reg)
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unw_regname (unw_regnum_t reg)
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{
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{
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if (reg < NELEMS (regname))
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if (reg < (unw_regnum_t) NELEMS (regname))
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return regname[reg];
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return regname[reg];
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else
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else
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return "???";
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return "???";
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@ -20,7 +20,7 @@ rotate_gr (struct cursor *c, int reg)
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else
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else
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{
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{
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preg = reg + rrb_gr; /* apply rotation */
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preg = reg + rrb_gr; /* apply rotation */
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if (preg > 32 + sor)
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if (preg > 32 + (int) sor)
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preg -= sor; /* wrap around */
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preg -= sor; /* wrap around */
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}
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}
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debug (100, "%s: sor=%u rrb.gr=%u, r%d -> r%d\n",
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debug (100, "%s: sor=%u rrb.gr=%u, r%d -> r%d\n",
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@ -106,13 +106,13 @@ do_unwind_tests (void)
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if ((ret = unw_get_reg (&c, UNW_IA64_CFM, &cfm)) < 0)
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if ((ret = unw_get_reg (&c, UNW_IA64_CFM, &cfm)) < 0)
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break;
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break;
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sof = cfm & 0x7f;
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sof = cfm & 0x7f;
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if (sof != (i & 1))
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if (sof != (unw_word_t) (i & 1))
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panic ("\texpected sof=%d, found sof=%lu\n", i - 1, sof);
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panic ("\texpected sof=%d, found sof=%lu\n", i - 1, sof);
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if (sof == 1)
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if (sof == 1)
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{
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{
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if ((ret = unw_get_reg (&c, UNW_IA64_GR + 32, &r32)) < 0)
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if ((ret = unw_get_reg (&c, UNW_IA64_GR + 32, &r32)) < 0)
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break;
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break;
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if (r32 != i - 1)
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if (r32 != (unw_word_t) (i - 1))
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panic ("\texpected r32=%d, found r32=%lu\n", i - 1, r32);
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panic ("\texpected r32=%d, found r32=%lu\n", i - 1, r32);
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}
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}
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}
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}
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