mirror of
https://github.com/tobast/libunwind-eh_elf.git
synced 2024-11-25 16:47:38 +01:00
[PPC32] Make PPC32 unwinding work for real.
This commit is contained in:
Jose Flavio Aguilar Paulino
David Mosberger-Tang
parent
57e5696463
commit
9ea6af8ed5
7 changed files with 55 additions and 165 deletions
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@ -62,7 +62,7 @@ extern "C" {
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* round that up to 280.
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*/
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#define UNW_TDEP_CURSOR_LEN 280
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#define UNW_TDEP_CURSOR_LEN 200
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#if __WORDSIZE==32
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typedef uint32_t unw_word_t;
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@ -109,7 +109,22 @@ typedef enum
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UNW_PPC32_R30,
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UNW_PPC32_R31, /* called HARD_FRAME_POINTER in gcc */
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UNW_PPC32_F0 = 32,
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/* Count Register */
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UNW_PPC32_CTR = 32,
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/* Fixed-Point Status and Control Register */
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UNW_PPC32_XER = 33,
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/* Condition Register */
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UNW_PPC32_CCR = 34,
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/* Machine State Register */
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//UNW_PPC32_MSR = 35,
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/* MQ or SPR0, not part of generic Power, part of MPC601 */
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//UNW_PPC32_MQ = 36,
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/* Link Register */
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UNW_PPC32_LR = 36,
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/* Floating Pointer Status and Control Register */
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UNW_PPC32_FPSCR = 37,
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UNW_PPC32_F0 = 48,
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UNW_PPC32_F1,
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UNW_PPC32_F2,
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UNW_PPC32_F3,
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@ -142,43 +157,9 @@ typedef enum
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UNW_PPC32_F30,
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UNW_PPC32_F31,
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/* Note that there doesn't appear to be an .eh_frame register column
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for the FPSCR register. I don't know why this is. Since .eh_frame
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info is what this implementation uses for unwinding, we have no way
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to unwind this register, and so we will not expose an FPSCR register
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number in the libunwind API.
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*/
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UNW_TDEP_LAST_REG = UNW_PPC32_F31,
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UNW_PPC32_LR = 65,
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UNW_PPC32_CTR = 66,
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UNW_PPC32_ARG_POINTER = 67,
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UNW_PPC32_CR0 = 68,
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UNW_PPC32_CR1,
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UNW_PPC32_CR2,
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UNW_PPC32_CR3,
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UNW_PPC32_CR4,
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/* CR5 .. CR7 are currently unused */
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UNW_PPC32_CR5,
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UNW_PPC32_CR6,
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UNW_PPC32_CR7,
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UNW_PPC32_XER = 76,
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UNW_PPC32_VRSAVE = 109,
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UNW_PPC32_VSCR = 110,
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UNW_PPC32_SPE_ACC = 111,
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UNW_PPC32_SPEFSCR = 112,
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/* frame info (read-only) */
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UNW_PPC32_FRAME_POINTER,
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UNW_PPC32_NIP,
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UNW_TDEP_LAST_REG = UNW_PPC32_NIP,
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UNW_TDEP_IP = UNW_PPC32_NIP,
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UNW_TDEP_IP = UNW_PPC32_LR,
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UNW_TDEP_SP = UNW_PPC32_R1,
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UNW_TDEP_EH = UNW_PPC32_R12
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}
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@ -68,6 +68,12 @@ uint8_t dwarf_to_unw_regnum_map[DWARF_REGNUM_MAP_LENGTH] =
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[UNW_PPC32_R30]=UNW_PPC32_R30,
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[UNW_PPC32_R31]=UNW_PPC32_R31,
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[UNW_PPC32_CTR]=UNW_PPC32_CTR,
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[UNW_PPC32_XER]=UNW_PPC32_XER,
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[UNW_PPC32_CCR]=UNW_PPC32_CCR,
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[UNW_PPC32_LR]=UNW_PPC32_LR,
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[UNW_PPC32_FPSCR]=UNW_PPC32_FPSCR,
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[UNW_PPC32_F0]=UNW_PPC32_F0,
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[UNW_PPC32_F1]=UNW_PPC32_F1,
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[UNW_PPC32_F2]=UNW_PPC32_F2,
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@ -100,25 +106,6 @@ uint8_t dwarf_to_unw_regnum_map[DWARF_REGNUM_MAP_LENGTH] =
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[UNW_PPC32_F29]=UNW_PPC32_F29,
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[UNW_PPC32_F30]=UNW_PPC32_F30,
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[UNW_PPC32_F31]=UNW_PPC32_F31,
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[UNW_PPC32_LR]=UNW_PPC32_LR,
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[UNW_PPC32_CTR]=UNW_PPC32_CTR,
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[UNW_PPC32_ARG_POINTER]=UNW_PPC32_ARG_POINTER,
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[UNW_PPC32_CR0]=UNW_PPC32_CR0,
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[UNW_PPC32_CR1]=UNW_PPC32_CR1,
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[UNW_PPC32_CR2]=UNW_PPC32_CR2,
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[UNW_PPC32_CR3]=UNW_PPC32_CR3,
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[UNW_PPC32_CR4]=UNW_PPC32_CR4,
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[UNW_PPC32_CR5]=UNW_PPC32_CR5,
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[UNW_PPC32_CR6]=UNW_PPC32_CR6,
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[UNW_PPC32_CR7]=UNW_PPC32_CR7,
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[UNW_PPC32_XER]=UNW_PPC32_XER,
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[UNW_PPC32_VRSAVE]=UNW_PPC32_VRSAVE,
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[UNW_PPC32_VSCR]=UNW_PPC32_VSCR,
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[UNW_PPC32_SPE_ACC]=UNW_PPC32_SPE_ACC,
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[UNW_PPC32_SPEFSCR]=UNW_PPC32_SPEFSCR,
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};
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HIDDEN void
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@ -55,7 +55,9 @@ uc_addr (ucontext_t *uc, int reg)
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if ((unsigned) (reg - UNW_PPC32_R0) < 32)
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addr = &uc->uc_mcontext.uc_regs->gregs[reg - UNW_PPC32_R0];
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else if ((unsigned) (reg - UNW_PPC32_F0) < 32)
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else
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if ( ((unsigned) (reg - UNW_PPC32_F0) < 32) &&
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((unsigned) (reg - UNW_PPC32_F0) >= 0) )
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addr = &uc->uc_mcontext.uc_regs->fpregs.fpregs[reg - UNW_PPC32_F0];
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else
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@ -64,9 +66,6 @@ uc_addr (ucontext_t *uc, int reg)
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switch (reg)
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{
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case UNW_PPC32_NIP:
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gregs_idx = NIP_IDX;
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break;
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case UNW_PPC32_CTR:
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gregs_idx = CTR_IDX;
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break;
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@ -76,7 +75,7 @@ uc_addr (ucontext_t *uc, int reg)
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case UNW_PPC32_XER:
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gregs_idx = XER_IDX;
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break;
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case UNW_PPC32_CR0:
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case UNW_PPC32_CCR:
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gregs_idx = CCR_IDX;
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break;
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default:
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@ -138,7 +137,8 @@ access_reg (unw_addr_space_t as, unw_regnum_t reg, unw_word_t *val,
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unw_word_t *addr;
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ucontext_t *uc = arg;
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if ((unsigned int) (reg - UNW_PPC32_F0) < 32)
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if ( ((unsigned int) (reg - UNW_PPC32_F0) < 32) &&
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((unsigned int) (reg - UNW_PPC32_F0) >= 0))
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goto badreg;
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addr = uc_addr (uc, reg);
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@ -44,7 +44,6 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */
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typedef struct
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{
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long unsigned back_chain;
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long unsigned cr_save;
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long unsigned lr_save;
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/* many more fields here, but they are unused by this code */
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} stack_frame_t;
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@ -55,8 +54,8 @@ unw_step (unw_cursor_t * cursor)
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{
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struct cursor *c = (struct cursor *) cursor;
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stack_frame_t dummy;
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unw_word_t back_chain_offset, lr_save_offset, v_regs_ptr;
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struct dwarf_loc back_chain_loc, lr_save_loc, sp_loc, ip_loc, v_regs_loc;
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unw_word_t back_chain_offset, lr_save_offset;
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struct dwarf_loc back_chain_loc, lr_save_loc, sp_loc, ip_loc;
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int ret;
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Debug (1, "(cursor=%p, ip=0x%016lx)\n", c, (unsigned long) c->dwarf.ip);
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@ -141,7 +140,7 @@ unw_step (unw_cursor_t * cursor)
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c->sigcontext_addr = ucontext;
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sp_loc = DWARF_LOC (ucontext + UC_MCONTEXT_GREGS_R1, 0);
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ip_loc = DWARF_LOC (ucontext + UC_MCONTEXT_GREGS_NIP, 0);
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ip_loc = DWARF_LOC (ucontext + UC_MCONTEXT_GREGS_LINK, 0);
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ret = dwarf_get (&c->dwarf, sp_loc, &c->dwarf.cfa);
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if (ret < 0)
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@ -229,21 +228,14 @@ unw_step (unw_cursor_t * cursor)
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DWARF_LOC (ucontext + UC_MCONTEXT_GREGS_LINK, 0);
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c->dwarf.loc[UNW_PPC32_CTR] =
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DWARF_LOC (ucontext + UC_MCONTEXT_GREGS_CTR, 0);
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/* This CR0 assignment is probably wrong. There are 8 dwarf columns
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assigned to the CR registers, but only one CR register in the
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mcontext structure */
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c->dwarf.loc[UNW_PPC32_CR0] =
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c->dwarf.loc[UNW_PPC32_CCR] =
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DWARF_LOC (ucontext + UC_MCONTEXT_GREGS_CCR, 0);
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c->dwarf.loc[UNW_PPC32_XER] =
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DWARF_LOC (ucontext + UC_MCONTEXT_GREGS_XER, 0);
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c->dwarf.loc[UNW_PPC32_NIP] =
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DWARF_LOC (ucontext + UC_MCONTEXT_GREGS_NIP, 0);
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/* TODO: Is there a way of obtaining the value of the
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pseudo frame pointer (which is sp + some fixed offset, I
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assume), based on the contents of the ucontext record
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structure? For now, set this loc to null. */
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c->dwarf.loc[UNW_PPC32_FRAME_POINTER] = DWARF_NULL_LOC;
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c->dwarf.loc[UNW_PPC32_F0] =
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DWARF_LOC (ucontext + UC_MCONTEXT_FREGS_R0, 0);
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@ -42,22 +42,13 @@ common_init_ppc32 (struct cursor *c)
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c->dwarf.loc[i] = DWARF_FPREG_LOC (&c->dwarf, i);
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}
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for (i = UNW_PPC32_CR0; i <= UNW_PPC32_CR7; i++) {
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c->dwarf.loc[i] = DWARF_REG_LOC (&c->dwarf, i);
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}
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c->dwarf.loc[UNW_PPC32_ARG_POINTER] = DWARF_REG_LOC (&c->dwarf, UNW_PPC32_ARG_POINTER);
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c->dwarf.loc[UNW_PPC32_CTR] = DWARF_REG_LOC (&c->dwarf, UNW_PPC32_CTR);
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c->dwarf.loc[UNW_PPC32_VSCR] = DWARF_REG_LOC (&c->dwarf, UNW_PPC32_VSCR);
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c->dwarf.loc[UNW_PPC32_XER] = DWARF_REG_LOC (&c->dwarf, UNW_PPC32_XER);
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c->dwarf.loc[UNW_PPC32_CCR] = DWARF_REG_LOC (&c->dwarf, UNW_PPC32_CCR);
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c->dwarf.loc[UNW_PPC32_LR] = DWARF_REG_LOC (&c->dwarf, UNW_PPC32_LR);
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c->dwarf.loc[UNW_PPC32_VRSAVE] = DWARF_REG_LOC (&c->dwarf, UNW_PPC32_VRSAVE);
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c->dwarf.loc[UNW_PPC32_SPEFSCR] = DWARF_REG_LOC (&c->dwarf, UNW_PPC32_SPEFSCR);
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c->dwarf.loc[UNW_PPC32_SPE_ACC] = DWARF_REG_LOC (&c->dwarf, UNW_PPC32_SPE_ACC);
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c->dwarf.loc[UNW_PPC32_FPSCR] = DWARF_REG_LOC (&c->dwarf, UNW_PPC32_FPSCR);
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c->dwarf.loc[UNW_PPC32_NIP] = DWARF_REG_LOC (&c->dwarf, UNW_PPC32_NIP);
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ret = dwarf_get (&c->dwarf, c->dwarf.loc[UNW_PPC32_NIP], &c->dwarf.ip);
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ret = dwarf_get (&c->dwarf, c->dwarf.loc[UNW_PPC32_LR], &c->dwarf.ip);
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if (ret < 0)
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return ret;
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@ -62,6 +62,12 @@ static const char *regname[] =
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[UNW_PPC32_R30]="GPR30",
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[UNW_PPC32_R31]="GPR31",
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[UNW_PPC32_CTR]="CTR",
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[UNW_PPC32_XER]="XER",
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[UNW_PPC32_CCR]="CCR",
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[UNW_PPC32_LR]="LR",
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[UNW_PPC32_FPSCR]="FPSCR",
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[UNW_PPC32_F0]="FPR0",
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[UNW_PPC32_F1]="FPR1",
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[UNW_PPC32_F2]="FPR2",
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@ -93,29 +99,7 @@ static const char *regname[] =
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[UNW_PPC32_F28]="FPR28",
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[UNW_PPC32_F29]="FPR29",
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[UNW_PPC32_F30]="FPR30",
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[UNW_PPC32_F31]="FPR31",
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[UNW_PPC32_LR]="LR",
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[UNW_PPC32_CTR]="CTR",
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[UNW_PPC32_ARG_POINTER]="ARG_POINTER",
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[UNW_PPC32_CR0]="CR0",
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[UNW_PPC32_CR1]="CR1",
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[UNW_PPC32_CR2]="CR2",
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[UNW_PPC32_CR3]="CR3",
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[UNW_PPC32_CR4]="CR4",
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[UNW_PPC32_CR5]="CR5",
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[UNW_PPC32_CR6]="CR6",
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[UNW_PPC32_CR7]="CR7",
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[UNW_PPC32_XER]="XER",
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[UNW_PPC32_VSCR]="VSCR",
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[UNW_PPC32_VRSAVE]="VRSAVE",
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[UNW_PPC32_SPE_ACC]="SPE_ACC",
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[UNW_PPC32_SPEFSCR]="SPEFSCR",
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[UNW_PPC32_F31]="FPR31"
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};
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PROTECTED const char *
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@ -33,21 +33,13 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */
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/usr/src/linux-2.6.18-1.8/arch/powerpc/kernel/ppc32.h
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*/
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#define NIP_IDX 32
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#define MSR_IDX 33
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#define ORIG_GPR3_IDX 34
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#define CTR_IDX 35
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//#define NIP_IDX 32
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#define CTR_IDX 32
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#define XER_IDX 33
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#define CCR_IDX 34
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#define MSR_IDX 35
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//#define MQ_IDX 36
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#define LINK_IDX 36
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#define XER_IDX 37
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#define CCR_IDX 38
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#define SOFTE_IDX 39
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#define TRAP_IDX 40
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#define DAR_IDX 41
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#define DSISR_IDX 42
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#define RESULT_IDX 43
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#define VSCR_IDX 32
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#define VRSAVE_IDX 33
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/* These are dummy structures used only for obtaining the offsets of the
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various structure members. */
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@ -86,7 +78,7 @@ static vrregset_t dmy_vrregset;
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#define UC_MCONTEXT_GREGS_R29 ((void *)&dmy_ctxt.uc_mcontext.uc_regs->gregs[29] - (void *)&dmy_ctxt)
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#define UC_MCONTEXT_GREGS_R30 ((void *)&dmy_ctxt.uc_mcontext.uc_regs->gregs[30] - (void *)&dmy_ctxt)
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#define UC_MCONTEXT_GREGS_R31 ((void *)&dmy_ctxt.uc_mcontext.uc_regs->gregs[31] - (void *)&dmy_ctxt)
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#define UC_MCONTEXT_GREGS_NIP ((void *)&dmy_ctxt.uc_mcontext.uc_regs->gregs[NIP_IDX] - (void *)&dmy_ctxt)
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#define UC_MCONTEXT_GREGS_MSR ((void *)&dmy_ctxt.uc_mcontext.uc_regs->gregs[MSR_IDX] - (void *)&dmy_ctxt)
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#define UC_MCONTEXT_GREGS_ORIG_GPR3 ((void *)&dmy_ctxt.uc_mcontext.uc_regs->gregs[ORIG_GPR3_IDX] - (void *)&dmy_ctxt)
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#define UC_MCONTEXT_GREGS_CTR ((void *)&dmy_ctxt.uc_mcontext.uc_regs->gregs[CTR_IDX] - (void *)&dmy_ctxt)
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@ -133,41 +125,4 @@ static vrregset_t dmy_vrregset;
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#define UC_MCONTEXT_FREGS_R31 ((void *)&dmy_ctxt.uc_mcontext.uc_regs->fpregs.fpregs[31] - (void *)&dmy_ctxt)
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#define UC_MCONTEXT_FREGS_FPSCR ((void *)&dmy_ctxt.uc_mcontext.uc_regs->fpregs.fpregs[32] - (void *)&dmy_ctxt)
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#define UC_MCONTEXT_V_REGS ((void *)&dmy_ctxt.uc_mcontext.v_regs - (void *)&dmy_ctxt)
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#define UC_MCONTEXT_VREGS_R0 ((void *)&dmy_vrregset.vrregs[0] - (void *)&dmy_vrregset)
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#define UC_MCONTEXT_VREGS_R1 ((void *)&dmy_vrregset.vrregs[1] - (void *)&dmy_vrregset)
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#define UC_MCONTEXT_VREGS_R2 ((void *)&dmy_vrregset.vrregs[2] - (void *)&dmy_vrregset)
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#define UC_MCONTEXT_VREGS_R3 ((void *)&dmy_vrregset.vrregs[3] - (void *)&dmy_vrregset)
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#define UC_MCONTEXT_VREGS_R4 ((void *)&dmy_vrregset.vrregs[4] - (void *)&dmy_vrregset)
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#define UC_MCONTEXT_VREGS_R5 ((void *)&dmy_vrregset.vrregs[5] - (void *)&dmy_vrregset)
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#define UC_MCONTEXT_VREGS_R6 ((void *)&dmy_vrregset.vrregs[6] - (void *)&dmy_vrregset)
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#define UC_MCONTEXT_VREGS_R7 ((void *)&dmy_vrregset.vrregs[7] - (void *)&dmy_vrregset)
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#define UC_MCONTEXT_VREGS_R8 ((void *)&dmy_vrregset.vrregs[8] - (void *)&dmy_vrregset)
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#define UC_MCONTEXT_VREGS_R9 ((void *)&dmy_vrregset.vrregs[9] - (void *)&dmy_vrregset)
|
||||
#define UC_MCONTEXT_VREGS_R10 ((void *)&dmy_vrregset.vrregs[10] - (void *)&dmy_vrregset)
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||||
#define UC_MCONTEXT_VREGS_R11 ((void *)&dmy_vrregset.vrregs[11] - (void *)&dmy_vrregset)
|
||||
#define UC_MCONTEXT_VREGS_R12 ((void *)&dmy_vrregset.vrregs[12] - (void *)&dmy_vrregset)
|
||||
#define UC_MCONTEXT_VREGS_R13 ((void *)&dmy_vrregset.vrregs[13] - (void *)&dmy_vrregset)
|
||||
#define UC_MCONTEXT_VREGS_R14 ((void *)&dmy_vrregset.vrregs[14] - (void *)&dmy_vrregset)
|
||||
#define UC_MCONTEXT_VREGS_R15 ((void *)&dmy_vrregset.vrregs[15] - (void *)&dmy_vrregset)
|
||||
#define UC_MCONTEXT_VREGS_R16 ((void *)&dmy_vrregset.vrregs[16] - (void *)&dmy_vrregset)
|
||||
#define UC_MCONTEXT_VREGS_R17 ((void *)&dmy_vrregset.vrregs[17] - (void *)&dmy_vrregset)
|
||||
#define UC_MCONTEXT_VREGS_R18 ((void *)&dmy_vrregset.vrregs[18] - (void *)&dmy_vrregset)
|
||||
#define UC_MCONTEXT_VREGS_R19 ((void *)&dmy_vrregset.vrregs[19] - (void *)&dmy_vrregset)
|
||||
#define UC_MCONTEXT_VREGS_R20 ((void *)&dmy_vrregset.vrregs[20] - (void *)&dmy_vrregset)
|
||||
#define UC_MCONTEXT_VREGS_R21 ((void *)&dmy_vrregset.vrregs[21] - (void *)&dmy_vrregset)
|
||||
#define UC_MCONTEXT_VREGS_R22 ((void *)&dmy_vrregset.vrregs[22] - (void *)&dmy_vrregset)
|
||||
#define UC_MCONTEXT_VREGS_R23 ((void *)&dmy_vrregset.vrregs[23] - (void *)&dmy_vrregset)
|
||||
#define UC_MCONTEXT_VREGS_R24 ((void *)&dmy_vrregset.vrregs[24] - (void *)&dmy_vrregset)
|
||||
#define UC_MCONTEXT_VREGS_R25 ((void *)&dmy_vrregset.vrregs[25] - (void *)&dmy_vrregset)
|
||||
#define UC_MCONTEXT_VREGS_R26 ((void *)&dmy_vrregset.vrregs[26] - (void *)&dmy_vrregset)
|
||||
#define UC_MCONTEXT_VREGS_R27 ((void *)&dmy_vrregset.vrregs[27] - (void *)&dmy_vrregset)
|
||||
#define UC_MCONTEXT_VREGS_R28 ((void *)&dmy_vrregset.vrregs[28] - (void *)&dmy_vrregset)
|
||||
#define UC_MCONTEXT_VREGS_R29 ((void *)&dmy_vrregset.vrregs[29] - (void *)&dmy_vrregset)
|
||||
#define UC_MCONTEXT_VREGS_R30 ((void *)&dmy_vrregset.vrregs[30] - (void *)&dmy_vrregset)
|
||||
#define UC_MCONTEXT_VREGS_R31 ((void *)&dmy_vrregset.vrregs[31] - (void *)&dmy_vrregset)
|
||||
#define UC_MCONTEXT_VREGS_VSCR ((void *)&dmy_vrregset.vscr - (void *)&dmy_vrregset)
|
||||
#define UC_MCONTEXT_VREGS_VRSAVE ((void *)&dmy_vrregset.vrsave - (void *)&dmy_vrregset)
|
||||
|
||||
#endif
|
||||
|
|
|
|||
Loading…
Reference in a new issue