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UPT: Add reg offsets for ppc32/64
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1 changed files with 147 additions and 2 deletions
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@ -335,8 +335,153 @@ int _UPT_reg_offset[UNW_REG_LAST + 1] =
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#else
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#error Port me
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#endif
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#elif defined(UNW_TARGET_PPC32)
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#elif defined(UNW_TARGET_PPC64)
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#elif defined(UNW_TARGET_PPC32) || defined(UNW_TARGET_PPC64)
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#define UNW_REG_SLOT_SIZE sizeof(unsigned long)
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#define UNW_PPC_R(v) ((v) * UNW_REG_SLOT_SIZE)
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#define UNW_PPC_PT(p) UNW_PPC_R(PT_##p)
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#define UNW_FP_OFF(b, i) \
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[UNW_PPC##b##_F##i] = UNW_PPC_R(PT_FPR0 + i * 8/UNW_REG_SLOT_SIZE)
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#define UNW_R_OFF(b, i) \
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[UNW_PPC##b##_R##i] = UNW_PPC_R(PT_R##i)
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#define UNW_PPC_REGS(b) \
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UNW_R_OFF(b, 0), \
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UNW_R_OFF(b, 1), \
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UNW_R_OFF(b, 2), \
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UNW_R_OFF(b, 3), \
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UNW_R_OFF(b, 4), \
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UNW_R_OFF(b, 5), \
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UNW_R_OFF(b, 6), \
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UNW_R_OFF(b, 7), \
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UNW_R_OFF(b, 8), \
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UNW_R_OFF(b, 9), \
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UNW_R_OFF(b, 10), \
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UNW_R_OFF(b, 11), \
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UNW_R_OFF(b, 12), \
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UNW_R_OFF(b, 13), \
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UNW_R_OFF(b, 14), \
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UNW_R_OFF(b, 15), \
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UNW_R_OFF(b, 16), \
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UNW_R_OFF(b, 17), \
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UNW_R_OFF(b, 18), \
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UNW_R_OFF(b, 19), \
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UNW_R_OFF(b, 20), \
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UNW_R_OFF(b, 21), \
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UNW_R_OFF(b, 22), \
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UNW_R_OFF(b, 23), \
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UNW_R_OFF(b, 24), \
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UNW_R_OFF(b, 25), \
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UNW_R_OFF(b, 26), \
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UNW_R_OFF(b, 27), \
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UNW_R_OFF(b, 28), \
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UNW_R_OFF(b, 29), \
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UNW_R_OFF(b, 30), \
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UNW_R_OFF(b, 31), \
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\
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[UNW_PPC##b##_CTR] = UNW_PPC_PT(CTR), \
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[UNW_PPC##b##_XER] = UNW_PPC_PT(XER), \
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[UNW_PPC##b##_LR] = UNW_PPC_PT(LNK), \
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\
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UNW_FP_OFF(b, 0), \
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UNW_FP_OFF(b, 1), \
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UNW_FP_OFF(b, 2), \
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UNW_FP_OFF(b, 3), \
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UNW_FP_OFF(b, 4), \
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UNW_FP_OFF(b, 5), \
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UNW_FP_OFF(b, 6), \
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UNW_FP_OFF(b, 7), \
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UNW_FP_OFF(b, 8), \
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UNW_FP_OFF(b, 9), \
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UNW_FP_OFF(b, 10), \
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UNW_FP_OFF(b, 11), \
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UNW_FP_OFF(b, 12), \
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UNW_FP_OFF(b, 13), \
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UNW_FP_OFF(b, 14), \
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UNW_FP_OFF(b, 15), \
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UNW_FP_OFF(b, 16), \
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UNW_FP_OFF(b, 17), \
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UNW_FP_OFF(b, 18), \
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UNW_FP_OFF(b, 19), \
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UNW_FP_OFF(b, 20), \
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UNW_FP_OFF(b, 21), \
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UNW_FP_OFF(b, 22), \
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UNW_FP_OFF(b, 23), \
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UNW_FP_OFF(b, 24), \
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UNW_FP_OFF(b, 25), \
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UNW_FP_OFF(b, 26), \
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UNW_FP_OFF(b, 27), \
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UNW_FP_OFF(b, 28), \
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UNW_FP_OFF(b, 29), \
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UNW_FP_OFF(b, 30), \
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UNW_FP_OFF(b, 31)
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#define UNW_PPC32_REGS \
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[UNW_PPC##b##_FPSCR] = UNW_PPC_PT(FPSCR), \
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[UNW_PPC##b##_CCR] = UNW_PPC_PT(CCR)
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#define UNW_VR_OFF(i) \
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[UNW_PPC64_V##i] = UNW_PPC_R(PT_VR0 + i * 2)
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#define UNW_PPC64_REGS \
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[UNW_PPC64_NIP] = UNW_PPC_PT(NIP), \
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[UNW_PPC64_FRAME_POINTER] = -1, \
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[UNW_PPC64_ARG_POINTER] = -1, \
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[UNW_PPC64_CR0] = -1, \
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[UNW_PPC64_CR1] = -1, \
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[UNW_PPC64_CR2] = -1, \
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[UNW_PPC64_CR3] = -1, \
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[UNW_PPC64_CR4] = -1, \
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[UNW_PPC64_CR5] = -1, \
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[UNW_PPC64_CR6] = -1, \
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[UNW_PPC64_CR7] = -1, \
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[UNW_PPC64_VRSAVE] = UNW_PPC_PT(VRSAVE), \
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[UNW_PPC64_VSCR] = UNW_PPC_PT(VSCR), \
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[UNW_PPC64_SPE_ACC] = -1, \
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[UNW_PPC64_SPEFSCR] = -1, \
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UNW_VR_OFF(0), \
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UNW_VR_OFF(1), \
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UNW_VR_OFF(2), \
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UNW_VR_OFF(3), \
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UNW_VR_OFF(4), \
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UNW_VR_OFF(5), \
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UNW_VR_OFF(6), \
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UNW_VR_OFF(7), \
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UNW_VR_OFF(8), \
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UNW_VR_OFF(9), \
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UNW_VR_OFF(10), \
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UNW_VR_OFF(11), \
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UNW_VR_OFF(12), \
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UNW_VR_OFF(13), \
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UNW_VR_OFF(14), \
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UNW_VR_OFF(15), \
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UNW_VR_OFF(16), \
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UNW_VR_OFF(17), \
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UNW_VR_OFF(18), \
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UNW_VR_OFF(19), \
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UNW_VR_OFF(20), \
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UNW_VR_OFF(21), \
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UNW_VR_OFF(22), \
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UNW_VR_OFF(23), \
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UNW_VR_OFF(24), \
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UNW_VR_OFF(25), \
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UNW_VR_OFF(26), \
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UNW_VR_OFF(27), \
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UNW_VR_OFF(28), \
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UNW_VR_OFF(29), \
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UNW_VR_OFF(30), \
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UNW_VR_OFF(31)
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#if defined(UNW_TARGET_PPC32)
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UNW_PPC_REGS(32),
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UNW_PPC32_REGS,
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#else
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UNW_PPC_REGS(64),
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UNW_PPC64_REGS,
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#endif
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#elif defined(UNW_TARGET_ARM)
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[UNW_ARM_R0] = 0x00,
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[UNW_ARM_R1] = 0x04,
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