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Separate bundle template directive from instruction with a semicolon. The Intel

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assembler wants this.

(Logical change 1.68)
This commit is contained in:
mostang.com!davidm 2003-03-27 04:29:07 +00:00
parent a4e77a211a
commit 16192f7eac
1 changed files with 21 additions and 27 deletions
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48
tests/ia64-dyn-asm.S
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@ -1,7 +1,7 @@
.globl func_add1, func_add1_end .globl func_add1, func_add1_end
.proc func_add1 .proc func_add1
func_add1: func_add1:
{.mib add r8 = 1, r32 {.mib; add r8 = 1, r32
nop.i 0 nop.i 0
br.ret.sptk.many rp br.ret.sptk.many rp
} }
@ -11,42 +11,36 @@ func_add1_end:
.globl func_add3, func_add3_end .globl func_add3, func_add3_end
.proc func_add3 .proc func_add3
func_add3: func_add3:
{.mmi alloc loc0 = ar.pfs, 2, 1, 2, 0 {.mmi; alloc loc0 = ar.pfs, 2, 1, 2, 0
mov r2 = sp mov r2 = sp
add sp = -16, sp add sp = -16, sp
} ;; } ;;
{.mii {.mii; ld8 r8 = [in1], 8 // load the function pointer
ld8 r8 = [in1], 8 // load the function pointer
mov r3 = rp mov r3 = rp
mov rp = loc0 // trash rp mov rp = loc0 // trash rp
} ;; } ;;
{.mmi {.mmi; ld8 r9 = [r8], 8 // load the entry-point
ld8 r9 = [r8], 8 // load the entry-point
st8 [r2] = r3 st8 [r2] = r3
mov out0 = in0 mov out0 = in0
} ;; } ;;
{.mii ld8 gp = [r8] // load the gp {.mii; ld8 gp = [r8] // load the gp
mov b6 = r9 mov b6 = r9
mov out1 = in1 mov out1 = in1
} }
{.mib {.mib; nop 0
nop 0
nop 0 nop 0
br.call.sptk rp = b6 br.call.sptk rp = b6
} }
{.mmi {.mmi; add r2 = 16, sp
add r2 = 16, sp
;; ;;
ld8 r3 = [r2] // r3 = saved rp ld8 r3 = [r2] // r3 = saved rp
mov ar.pfs = loc0 mov ar.pfs = loc0
} ;; } ;;
{.mii {.mii; nop 0
nop 0
mov rp = r3 mov rp = r3
adds sp = 16, sp adds sp = 16, sp
} ;; } ;;
{.mib {.mib; st8 [sp] = in0 // trash rp save location
st8 [sp] = in0 // trash rp save location
add r8 = 2, r8 add r8 = 2, r8
br.ret.sptk.many rp br.ret.sptk.many rp
} }
@ -56,46 +50,46 @@ func_add3_end:
.globl func_vframe, func_vframe_end .globl func_vframe, func_vframe_end
.proc func_vframe .proc func_vframe
func_vframe: func_vframe:
{.mii alloc r16 = ar.pfs, 1, 2, 0, 0 // 0 {.mii; alloc r16 = ar.pfs, 1, 2, 0, 0 // 0
mov loc0 = rp mov loc0 = rp
mov loc1 = sp mov loc1 = sp
} ;; } ;;
{.mmi sub sp = sp, in0 {.mmi; sub sp = sp, in0
st8 [loc1] = r16 st8 [loc1] = r16
mov r2 = -99 // 0 mov r2 = -99 // 0
} ;; } ;;
{.mii nop 0 {.mii; nop 0
mov rp = r2 mov rp = r2
mov ar.pfs = r0 mov ar.pfs = r0
} }
{.mib mov r16 = r2 {.mib; mov r16 = r2
tbit.nz p6, p0 = in0, 4 tbit.nz p6, p0 = in0, 4
(p6) br.cond.sptk.many 1f (p6) br.cond.sptk.many .exit
} ;; } ;;
{.mmi ld8 r16 = [loc1] {.mmi; ld8 r16 = [loc1]
;; ;;
mov r3 = loc0 // 8 move saved rp to r3 mov r3 = loc0 // 8 move saved rp to r3
mov ar.pfs = r16 mov ar.pfs = r16
} ;; } ;;
{.mmi mov sp = loc1 // 10 {.mmi; mov sp = loc1 // 10
st8 [loc1] = r0 // trash saved pfs st8 [loc1] = r0 // trash saved pfs
mov loc0 = r2 mov loc0 = r2
} ;; } ;;
{.mib mov r8 = 10 {.mib; mov r8 = 10
mov rp = r3 mov rp = r3
br.ret.sptk.many rp br.ret.sptk.many rp
} }
1: .exit:
{.mmi ld8 r16 = [loc1] {.mmi; ld8 r16 = [loc1]
;; ;;
sub sp = 32, sp sub sp = 32, sp
mov ar.pfs = r16 mov ar.pfs = r16
} ;; } ;;
{.mmi mov sp = loc1 {.mmi; mov sp = loc1
st8 [loc1] = r0 // trash saved pfs st8 [loc1] = r0 // trash saved pfs
mov rp = loc0 mov rp = loc0
} }
{.mib nop 0 {.mib; nop 0
mov r8 = 4 mov r8 = 4
br.ret.sptk.many rp br.ret.sptk.many rp
} }