811 lines
15 KiB
Plaintext
811 lines
15 KiB
Plaintext
# MIPS/IRIX ISA/ABI
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# Used to configure dwarfdump printing of .debug_frame and
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# .eh_frame.
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# Any number of abi's can be described. Only one can be selected
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# in a given dwarfdump run (see dwarfdump options)
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# Available commands are
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# beginabi: <abiname>
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# reg: <regname> <dwarf regnumber>
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# frame_interface: <integer value 2 or 3>
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# cfa_reg: <number>
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# initial_reg_value: <number: often 1034 or 1035 >
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# same_val_reg: 1035
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# undefined_val_reg: 1034
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# reg_table_size: <size of table>
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# address_size: <4 or 8, Rarely needed, see example below. >
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# includeabi: <abiname Inserts the referenced abi as if its text was
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# directly inserted at this point.>
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# endabi: <abiname>
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#
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# Symbolic names do not work here, use literal numbers
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# where applicable (in C standard decimal, octal (leading 0) or
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# hexadecimal <leading 0x>).
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#
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# Whitespace is required to separate command: from operands and
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# operands from each other on a line.
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#
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# There is no ordering required within a beginabi/endabi pair.
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# As many ABIs as required may be listed.
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# dwarfdump will choose exactly one abi to dump frame information.
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#
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# MIPS abi,the old IRIX form, not to be used on modern objects.
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# Begin with abi name (use here and on dwarfdump command line).
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beginabi: mips-irix
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# Instructs dwarfdump to default to the older frame interface.
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# Use value 3 to use the newer interface.
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# The '2' interface is supported but deprecated (deprecated
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# because it cannot work with all popular ABIs: mixing
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# the cfa-rule into the table column set was not a good idea
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# but it is part of the MIPS/IRIX standard usage).
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frame_interface: 2
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# If (and only if) using frame_interface: 2 tell dwarfdump
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# what table colum that DW_FRAME_CFA_COL is.
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# If using frame_interface: 3 cfa_reg: should be
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# DW_FRAME_CFA_COL3 (1436)
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cfa_reg: 0
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# For MIPS, the same as DW_FRAME_SAME_VAL (1035).
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# For other ISA/ABIs 1034 (DW_FRAME_UNDEFINED_VAL) might be better.
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# Depends on the ABI convention, if set wrong way too many
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# regs will be listed in the frame output.
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# This instructs dwarfdump to set libdwarf to this value,
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# overriding the libdwarf default.
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# If initial_reg_value not set the libdwarf default is used
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# (see libdwarf.h DW_FRAME_REG_INITIAL_VALUE).
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initial_reg_value: 1035 # DW_FRAME_SAME_VAL
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same_val_reg: 1035
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undefined_val_reg: 1034
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# Built in to frame_interface: 2 as 66.
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reg_table_size: 66
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# Only name registers for wich a r4 (for example) is not what you
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# want to see
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# No particular order of the reg: lines required.
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reg: cfa 0 # Used with MIPS/IRIX original DWARF2 interface
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reg: r1/at 1
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reg: r2/v0 2
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reg: r3/v1 3
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reg: r4/a0 4
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reg: r5/a1 5
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reg: r6/a2 6
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reg: r7/a3 7
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reg: r8/t0 8
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reg: r9/t1 9
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reg: r10/t2 10
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reg: r11/t3 11
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reg: r12/t4 12
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reg: r13/t5 13
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reg: r14/t6 14
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reg: r15/t7 15
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reg: r16/s0 16
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reg: r17/s1 17
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reg: r18/s2 18
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reg: r19/s3 19
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reg: r20/s4 20
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reg: r21/s5 21
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reg: r22/s6 22
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reg: r23/s7 23
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reg: r24/t8 24
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reg: r25/t9 25
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reg: r26/k0 26
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reg: r27/k1 27
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reg: r28/gp 28
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reg: r29/sp 29
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reg: r30/s8 30
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reg: r31 31
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reg: $f0 32
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reg: $f1 33
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reg: $f2 34
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reg: $f3 35
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reg: $f4 36
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reg: $f5 37
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reg: $f6 38
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reg: $f7 39
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reg: $f8 40
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reg: $f9 41
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reg: $f10 42
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reg: $f11 43
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reg: $f12 44
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reg: $f13 45
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reg: $f14 46
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reg: $f15 47
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reg: $f16 48
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reg: $f17 49
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reg: $f18 50
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reg: $f19 51
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reg: $f20 52
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reg: $f21 53
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reg: $f22 54
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reg: $f23 55
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reg: $f24 56
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reg: $f25 57
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reg: $f26 58
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reg: $f27 59
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reg: $f28 60
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reg: $f29 61
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reg: $f30 62
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reg: $f31 63
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reg: ra 64
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reg: slk 65
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# End of abi definition.
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endabi: mips-irix
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# Make 'mips' abi be a modern MIPS, not an old IRIX version.
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beginabi: mips
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includeabi: mips-simple3
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endabi: mips
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# MIPS/IRIX ISA/ABI for testing libdwarf.
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beginabi: mips-irix2
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frame_interface: 2
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reg_table_size: 66
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cfa_reg: 0
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same_val_reg: 1035
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undefined_val_reg: 1034
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initial_reg_value: 1035
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reg: cfa 0 # Used with MIPS/IRIX original DWARF2 interface
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reg: ra 64
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reg: slk 65
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# End of abi definition.
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endabi: mips-irix2
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# MIPS/IRIX ISA/ABI for testing the new frame interface
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# with libdwarf.
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beginabi: mips-simple3
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frame_interface: 3
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# When using frame_interface: 3 the size of the register table
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# is not fixed. It can be as large as needed.
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reg_table_size: 66
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cfa_reg: 1436 # DW_FRAME_CFA_COL3
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initial_reg_value: 1035
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same_val_reg: 1035
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undefined_val_reg: 1034
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# No cfa as a 'normal' register.
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# Rule 0 is just register 0, which is not used
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# in frame descriptions.
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# (so cfa does not have a number here, and dwarfdump gives
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# it the name 'cfa' automatically).
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reg: ra 64
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reg: slk 65
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# End of abi definition.
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endabi: mips-simple3
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beginabi: ia64
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frame_interface: 3
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initial_reg_value: 1034 # DW_FRAME_UNDEFINED_VAL
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cfa_reg: 1436 # DW_FRAME_CFA_COL3
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reg_table_size: 695
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same_val_reg: 1035
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undefined_val_reg: 1034
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# The following register names are not necessarily correct...
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# Register indexes r32-r127 not used.
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reg: f0 128
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# ...
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reg: f127 255
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reg: b0 321
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reg: b1 322
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reg: b2 323
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reg: b3 324
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reg: b4 325
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reg: b5 326
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reg: b6 327
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reg: b7 328
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reg: vfp 329
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reg: vrap 330
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reg: pr 331
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reg: ip 332
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reg: psr 333
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reg: cfm 334
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reg: k0 335
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reg: k1 336
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reg: k2 337
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reg: k3 338
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reg: k4 339
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reg: k5 340
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reg: k6 341
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reg: k7 342
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reg: rsc 350
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reg: bsp 351
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reg: bspstore 352
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reg: rnat 353
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reg: fcr 355
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reg: eflag 358
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reg: csd 359
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reg: ssd 360
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reg: cflg 361
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reg: fsr 362
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reg: fir 363
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reg: fdr 364
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reg: pfs 398
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reg: lc 399
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reg: ec 400
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endabi: ia64
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beginabi: x86
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frame_interface: 3
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initial_reg_value: 1035 # DW_FRAME_SAME_VAL
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reg_table_size: 66 # more than large enough, hopefully.
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cfa_reg: 1436 # DW_FRAME_CFA_COL3
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same_val_reg: 1035
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undefined_val_reg: 1034
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# The following register names are not necessarily correct...
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reg: eax 0
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reg: ecx 1
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reg: edx 2
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reg: ebx 3
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reg: esp 4
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reg: ebp 5
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reg: esi 6
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reg: edi 7
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reg: eip 8
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reg: eflags 9
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reg: trapno 10
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reg: st0 11
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reg: st1 12
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reg: st2 13
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reg: st3 14
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reg: st4 15
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reg: st5 16
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reg: st6 17
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reg: st7 18
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# 19 is ? 20 is ?
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reg: xmm0 21
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reg: xmm1 22
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reg: xmm2 23
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reg: xmm3 24
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reg: xmm4 25
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reg: xmm5 26
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reg: xmm6 27
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reg: xmm7 28
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reg: mm0 29
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reg: mm1 30
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reg: mm2 31
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reg: mm3 32
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reg: mm4 33
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reg: mm5 34
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reg: mm6 35
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reg: mm7 36
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reg: fcw 37
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reg: fsw 38
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reg: mxcsr 39
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reg: es 40
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reg: cs 41
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reg: ss 42
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reg: ds 43
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reg: fs 44
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reg: gs 45
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# 46 47 are ?
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reg: tr 48
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reg: ldtr 49
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endabi: x86
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beginabi: x86_64
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frame_interface: 3
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initial_reg_value: 1035 # DW_FRAME_SAME_VAL
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reg_table_size: 66 # more than large enough, hopefully.
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cfa_reg: 1436 # DW_FRAME_CFA_COL3
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same_val_reg: 1035
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undefined_val_reg: 1034
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# The following register names are not necessarily correct...
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reg: rax 0
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reg: rdx 1
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reg: rcx 2
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reg: rbx 3
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reg: rsi 4
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reg: rdi 5
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reg: rbp 6
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reg: rsp 7
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reg: r8 8
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reg: r9 9
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reg: r10 10
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reg: r11 11
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reg: r12 12
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reg: r13 13
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reg: r14 14
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reg: r15 15
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reg: rip 16
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reg: xmm0 17
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reg: xmm1 18
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reg: xmm2 19
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reg: xmm3 20
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reg: xmm4 21
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reg: xmm5 22
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reg: xmm6 23
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reg: xmm7 24
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reg: xmm8 25
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reg: xmm9 26
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reg: xmm10 27
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reg: xmm11 28
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reg: xmm12 29
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reg: xmm13 30
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reg: xmm14 31
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reg: xmm15 32
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reg: st0 33
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reg: st1 34
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reg: st2 35
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reg: st3 36
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reg: st4 37
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reg: st5 38
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reg: st6 39
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reg: st7 40
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reg: mm0 41
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reg: mm1 42
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reg: mm2 43
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reg: mm3 44
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reg: mm4 45
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reg: mm5 46
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reg: mm6 47
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reg: mm7 48
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reg: rflags 49
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reg: es 50
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reg: cs 51
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reg: ss 52
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reg: ds 53
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reg: fs 54
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reg: gs 55
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# 56, 57 are ?
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reg: fs.base 58
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reg: gs.base 59
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# 60 61 are ?
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reg: tr 62
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reg: ldtr 63
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endabi: x86_64
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beginabi: m68k
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frame_interface: 3
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initial_reg_value: 1035 # DW_FRAME_SAME_VAL
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reg_table_size: 66 # more than large enough, hopefully.
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cfa_reg: 1436 # DW_FRAME_CFA_COL3
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same_val_reg: 1035
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undefined_val_reg: 1034
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reg: d0 0
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reg: d1 1
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reg: d2 2
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reg: d3 3
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reg: d4 4
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reg: d5 5
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reg: d6 6
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reg: d7 7
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reg: a0 8
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reg: a1 9
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reg: a2 10
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reg: a3 11
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reg: a4 12
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reg: a5 13
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reg: a6 14
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reg: sp 15
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reg: fp0 16
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reg: fp1 17
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reg: fp2 18
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reg: fp3 19
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reg: fp4 20
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reg: fp5 21
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reg: fp6 22
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reg: pc 23
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endabi: m68k
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# Demonstrates use of address_size and includeabi keywords.
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# address_size is useful when an Elf64 object has DWARF2
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# 32bit (4 byte) address-size frame data (which has no address_size field)
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# and no .debug_info section to provide the 32bit address size.
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beginabi: ppc32bitaddress
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address_size: 4
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includeabi: ppc
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endabi: ppc32bitaddress
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beginabi: ppc
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# This abi defined Oct 2008 based on:
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# http://refspecs.linuxfoundation.org/ELF/ppc64/PPC-elf64abi-1.9.html
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frame_interface: 3
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# abi dwarf table uses up thru 1155.
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# As of Oct 2008, the only ABI requiring a higher
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# DW_FRAME_SAME_VAL and DW_FRAME_CFA_COL3.
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initial_reg_value: 1235 # DW_FRAME_SAME_VAL
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cfa_reg: 1436 # DW_FRAME_CFA_COL3
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same_val_reg: 1235
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undefined_val_reg: 1234
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reg_table_size: 1200
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reg: r0 0
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reg: f0 32
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reg: f1 33
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reg: f2 34
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reg: f3 35
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reg: f4 36
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reg: f5 37
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reg: f6 38
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reg: f7 39
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reg: f8 40
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reg: f9 41
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reg: f10 42
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reg: f11 43
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reg: f12 44
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reg: f13 45
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reg: f14 46
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reg: f16 47
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reg: f17 48
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reg: f18 49
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reg: f19 50
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reg: f20 51
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reg: f21 52
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reg: f22 53
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reg: f23 54
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reg: f24 55
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reg: f25 56
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reg: f26 57
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reg: f27 58
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reg: f28 59
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reg: f29 60
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reg: f30 62
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reg: f31 63
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reg: cr 64
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reg: fpcsr 65
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# spr0 is also called MQ
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reg: spr0 100
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# spr1 is also called XER
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reg: spr1 101
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# spr4 also called rtcu
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reg: spr4 104
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# spr5 also called rtcl
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reg: spr5 105
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#spr8 also called LR
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reg: spr8 108
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# spr9 also called ctr
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reg: spr9 109
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reg: msr 66
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reg: sr0 70
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reg: sr1 71
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reg: sr2 72
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reg: sr3 73
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reg: sr4 74
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reg: sr5 75
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reg: sr6 76
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reg: sr7 77
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reg: sr8 78
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reg: sr9 79
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#dsisr also called spr18
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reg: spr18 118
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# dar also called spr19
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reg: spr19 119
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#dec also called spr22
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reg: spr22 122
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#sdr1 also called spr25
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reg: spr25 125
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#srr0 also called spr26
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reg: spr26 126
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#srr1 also called spr27
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reg: spr27 127
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#vrsave also called spr256
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reg: spr256 356
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#sprg0 also called spr272
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reg: spr272 372
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#sprg1 also called spr273
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reg: spr273 373
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#sprg2 also called spr274
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reg: spr274 374
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#sprg3 also called spr275
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reg: spr275 375
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#asr also called spr280
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reg: spr280 380
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#ear also called spr282
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reg: spr282 382
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#tb also called spr284
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reg: spr284 384
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#tbu also called spr285
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reg: spr285 385
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#pvr also called spr287
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reg: spr287 387
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#ibat0u also called spr528
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reg: spr528 628
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#ibat0l also called spr529
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reg: spr529 629
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#ibat1u also called spr530
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reg: spr530 630
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#ibat1l also called spr531
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reg: spr531 631
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#ibat2u also called spr532
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reg: spr532 632
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#ibat2l also called spr533
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reg: spr533 633
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#ibat3u also called spr534
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reg: spr534 634
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#ibat3l also called spr535
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reg: spr535 635
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#dbat0u also called spr536
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reg: spr536 636
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#dbat0l also called spr537
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reg: spr537 637
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#dbat1u also called spr538
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reg: spr538 638
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#dbat1l also called spr539
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reg: spr539 639
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#dbat2u also called spr540
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reg: spr540 640
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#dbat2l also called spr541
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reg: spr541 641
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#dbat3u also called spr542
|
|
reg: spr542 642
|
|
#dbat3l also called spr543
|
|
reg: spr543 643
|
|
|
|
#hid0 also called spr1008
|
|
reg: spr1008 1108
|
|
#hid1 also called spr1009
|
|
reg: spr1009 1109
|
|
#hid2 also called iabr or spr1010
|
|
reg: spr1010 1110
|
|
#hid5 also called dabr or spr1013
|
|
reg: spr1013 1113
|
|
#hid15 also called pir or spr1023
|
|
reg: spr1023 1123
|
|
|
|
# vector registers 0-31
|
|
reg: vr0 1124
|
|
reg: vr1 1125
|
|
reg: vr2 1126
|
|
reg: vr3 1127
|
|
reg: vr4 1128
|
|
reg: vr5 1129
|
|
reg: vr6 1130
|
|
reg: vr7 1131
|
|
reg: vr8 1132
|
|
reg: vr9 1133
|
|
reg: vr10 1134
|
|
reg: vr11 1135
|
|
reg: vr12 1136
|
|
reg: vr13 1137
|
|
reg: vr14 1138
|
|
reg: vr15 1130
|
|
reg: vr16 1140
|
|
reg: vr17 1141
|
|
reg: vr18 1142
|
|
reg: vr19 1143
|
|
reg: vr20 1144
|
|
reg: vr21 1145
|
|
reg: vr22 1146
|
|
reg: vr23 1147
|
|
reg: vr24 1148
|
|
reg: vr25 1149
|
|
reg: vr26 1150
|
|
reg: vr27 1151
|
|
reg: vr28 1152
|
|
reg: vr29 1153
|
|
reg: vr30 1154
|
|
reg: vr31 1155
|
|
endabi: ppc
|
|
|
|
# 'Generic 1000 register abi'.
|
|
# This is useful as a 'general' ABI settings for
|
|
# cpus using up to 1000 registers. The register names
|
|
# show as a number, like 'r991'.
|
|
beginabi: generic
|
|
frame_interface: 3
|
|
initial_reg_value: 1035 # DW_FRAME_SAME_VAL
|
|
cfa_reg: 1436 # DW_FRAME_CFA_COL3
|
|
reg_table_size: 1000
|
|
same_val_reg: 1035
|
|
undefined_val_reg: 1034
|
|
reg: r0 0
|
|
endabi: generic
|
|
|
|
# 'Generic 500 register abi'.
|
|
# This is useful as a 'general' ABI settings for
|
|
# cpus using up to 500 registers. The register names
|
|
# show as a number, like 'r91'.
|
|
beginabi: generic500
|
|
frame_interface: 3
|
|
initial_reg_value: 1035 # DW_FRAME_SAME_VAL
|
|
cfa_reg: 1436 # DW_FRAME_CFA_COL3
|
|
reg_table_size: 500
|
|
same_val_reg: 1035
|
|
undefined_val_reg: 1034
|
|
reg: r0 0
|
|
endabi: generic500
|
|
|
|
# 'Generic 100 register abi'.
|
|
# This is useful as a 'general' ABI settings for
|
|
# cpus using up to 100 registers. The register names
|
|
# show as a number, like 'r91'.
|
|
beginabi: generic100
|
|
frame_interface: 3
|
|
initial_reg_value: 1035 # DW_FRAME_SAME_VAL
|
|
cfa_reg: 1436 # DW_FRAME_CFA_COL3
|
|
reg_table_size: 100
|
|
same_val_reg: 1035
|
|
undefined_val_reg: 1034
|
|
reg: r0 0
|
|
endabi: generic100
|
|
|
|
|
|
beginabi: arm
|
|
frame_interface: 3
|
|
# When using frame_interface: 3 the size of the register
|
|
# table is not fixed. It can be as large as needed.
|
|
reg_table_size: 288
|
|
cfa_reg: 1436 # DW_FRAME_CFA_COL3
|
|
initial_reg_value: 1034
|
|
same_val_reg: 1035
|
|
undefined_val_reg: 1034
|
|
# If the vendor co-processor registers are allowed
|
|
# or other numbers above 287 used then
|
|
# the reg_table_size must be increased and (possibly)
|
|
# the cfa, same_value, undefined_value reg values changed
|
|
# here.
|
|
# r0-r15 are 0 through 15.
|
|
# Numbers 16 through 63 had meaning
|
|
# in some ARM DWARF register mappings.
|
|
reg: s0 64
|
|
reg: s1 65
|
|
reg: s2 66
|
|
reg: s3 67
|
|
reg: s4 68
|
|
reg: s5 69
|
|
reg: s6 70
|
|
reg: s7 71
|
|
reg: s8 72
|
|
reg: s9 73
|
|
reg: s10 74
|
|
reg: s11 75
|
|
reg: s12 76
|
|
reg: s13 77
|
|
reg: s14 78
|
|
reg: s15 79
|
|
reg: s16 80
|
|
reg: s17 81
|
|
reg: s18 82
|
|
reg: s19 83
|
|
reg: s20 84
|
|
reg: s21 85
|
|
reg: s22 86
|
|
reg: s23 87
|
|
reg: s24 88
|
|
reg: s25 89
|
|
reg: s26 90
|
|
reg: s27 91
|
|
reg: s28 92
|
|
reg: s29 93
|
|
reg: s30 94
|
|
reg: s31 95
|
|
reg: f0 96
|
|
reg: f1 97
|
|
reg: f2 98
|
|
reg: f3 99
|
|
reg: f4 100
|
|
reg: f5 101
|
|
reg: f6 102
|
|
reg: f7 103
|
|
reg: wcgr0 104
|
|
reg: wcgr0 105
|
|
reg: wcgr0 106
|
|
reg: wcgr0 107
|
|
reg: wcgr0 108
|
|
reg: wcgr0 109
|
|
reg: wcgr0 110
|
|
reg: wcgr0 111
|
|
reg: wr0 112
|
|
reg: wr1 113
|
|
reg: wr2 114
|
|
reg: wr3 115
|
|
reg: wr4 116
|
|
reg: wr5 117
|
|
reg: wr6 118
|
|
reg: wr7 119
|
|
reg: wr8 120
|
|
reg: wr9 121
|
|
reg: wr10 122
|
|
reg: wr11 123
|
|
reg: wr12 124
|
|
reg: wr13 125
|
|
reg: wr14 126
|
|
reg: wr15 127
|
|
reg: spsr 128
|
|
reg: spsr_fiq 129
|
|
reg: spsr_irq 130
|
|
reg: spsr_abt 131
|
|
reg: spsr_und 132
|
|
reg: spsr_svc 133
|
|
reg: r8_usr 144
|
|
reg: r9_usr 145
|
|
reg: r10_usr 146
|
|
reg: r11_usr 147
|
|
reg: r12_usr 148
|
|
reg: r13_usr 149
|
|
reg: r14_usr 150
|
|
reg: r8_fiq 151
|
|
reg: r9_fiq 152
|
|
reg: r10_fiq 153
|
|
reg: r11_fiq 154
|
|
reg: r12_fiq 155
|
|
reg: r13_fiq 156
|
|
reg: r14_fiq 157
|
|
reg: r13_riq 158
|
|
reg: r14_riq 159
|
|
reg: r14_abt 160
|
|
reg: r13_abt 161
|
|
reg: r14_und 162
|
|
reg: r13_und 163
|
|
reg: r14_svc 164
|
|
reg: r13_svc 165
|
|
reg: wc0 192
|
|
reg: wc1 193
|
|
reg: wc2 192
|
|
reg: wc3 192
|
|
reg: wc4 192
|
|
reg: wc5 197
|
|
reg: wc6 198
|
|
reg: wc7 199
|
|
reg: d0 256
|
|
reg: d1 257
|
|
reg: d2 258
|
|
reg: d3 259
|
|
reg: d4 260
|
|
reg: d5 261
|
|
reg: d6 262
|
|
reg: d7 263
|
|
reg: d8 264
|
|
reg: d9 265
|
|
reg: d10 266
|
|
reg: d11 267
|
|
reg: d12 268
|
|
reg: d13 269
|
|
reg: d14 270
|
|
reg: d15 271
|
|
reg: d16 272
|
|
reg: d17 273
|
|
reg: d18 274
|
|
reg: d19 275
|
|
reg: d20 266
|
|
reg: d21 277
|
|
reg: d22 278
|
|
reg: d23 279
|
|
reg: d24 280
|
|
reg: d25 281
|
|
reg: d26 282
|
|
reg: d27 283
|
|
reg: d28 284
|
|
reg: d29 285
|
|
reg: d30 286
|
|
reg: d31 287
|
|
# End of abi definition.
|
|
endabi: arm
|
|
|