\section{Resource models}

As we saw earlier in \qtodo{ref}, the behaviour of a CPU's backend can be,
throughput-wise, characterized by the behaviour of its ports. Thus, a
throughput model of the backend consists in a mapping of the ISA's instructions
to execution ports of the backend, called a \emph{port mapping}.

The mapping, however, is not direct: we also saw in \qtodo{ref} that
instructions are themselves broken down into a number of \uops{}, which all
have to be executed. Each of those \uops{} are then scheduled on one of the
compatible execution ports of the CPU. A port mapping, thus, is actually a
tripartite graph: a first layer mapping instructions to \uops{}, followed by a
second layer mapping \uops{} to ports. In
\autoref{fig:port_mapping_excerpt_skx_tri}, 

\begin{figure}
    \centering
    \includegraphics[width=\textwidth]{p016_tri.svg}
\end{figure}
