From bd7b3b8ad648a02e70e4b72c4e75eb9dc82e336b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Th=C3=A9ophile=20Bastian?= Date: Wed, 21 Feb 2024 18:38:32 +0100 Subject: [PATCH] Start SOTA --- manuscrit/20_foundations/30_sota.tex | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/manuscrit/20_foundations/30_sota.tex b/manuscrit/20_foundations/30_sota.tex index 9a685ff..2af64f5 100644 --- a/manuscrit/20_foundations/30_sota.tex +++ b/manuscrit/20_foundations/30_sota.tex @@ -1 +1,25 @@ \section{State of the art}\label{sec:sota} + +Performance models for CPUs have been previously studied, and applied to +static code performance analysis. + +\medskip + +Since 1996, Agner Fog has been maintaining tables of values useful for +optimisation purposes for x86 instructions~\cite{AgnerFog}. These tables, still +maintained and updated today, are often considered very accurate. The main +issue, however, is that those tables are generated through the use of +hand-picked instructions and benchmarks, depending on specific hardware +counters and features specific to some CPU manufacturers. As such, while these +tables are very helpful on the supported CPUs for x86, the method does not +scale to the abundance of CPUs on which such tables may be useful ---~for +instance, ARM processors, embedded platforms, etc. + +\medskip + +Following the work of Agner Fog, Andreas Abel and Jan Reineke have designed the +\uopsinfo{} framework~\cite{uopsinfo}, striving to automate the previous +methodology. Their work, providing data tables for the vast majority of +instructions on many recent Intel microarchitectures, has been recently +enhanced to also support AMD architectures. It is, however, still limited to +% TODO HW counters, relevant microarchs