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Théophile Bastian 2024-11-20 12:54:09 +01:00
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57
slides/10_popularization/main.tex
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\centering
\includegraphics[width=\textwidth]{fugaku.jpg}
\emph{Le supercalculateur \emph{Fugaku} ---~© Riken}
\emph{Le supercalculateur \emph{Fugaku} ---~© RIKEN}
\end{frame}
\begin{frame}[c]{}
@ -18,3 +18,58 @@
\includegraphics[height=0.9\textheight]{serveur_supermicro.png}\\
\emph{Un serveur ---~© Supermicro}
\end{frame}
\begin{frame}
\centering
%\includegraphics[width=\textwidth]{fugaku.jpg}
\emph{Un processeur}
\end{frame}
\begin{frame}{Quelques ordres de grandeur}
\begin{columns}
\begin{column}{0.32\textwidth}
\begin{block}{Nombres}
\begin{itemize}
\item{} \emph{Fugaku}~: 158,976 CPUs
\end{itemize}
\end{block}
\end{column}\hfill
\begin{column}{0.32\textwidth}
\begin{block}{Coût}
\begin{itemize}
\item{} un processeur~: $\sim$~100--1\,000\,€
\item{} un serveur~: $\sim$~10\,000--50\,000\,€
\item{} \textit{Fugaku}~: 1 milliard~\$
\end{itemize}
\end{block}
\end{column}\hfill
\begin{column}{0.32\textwidth}
\begin{block}{Consommation}
\begin{itemize}
\item{} un serveur~: $\sim$~500\,W
\item{} \textit{Fugaku}~: 30--40\,MW ($\sim$~5\,\% d'un
réacteur nucléaire)
\end{itemize}
\end{block}
\end{column}
\end{columns}
\hfill
\begin{center}
\textbf{$\rightarrow$ gagner quelques \% de performance, c'est très
rentable~!}
\end{center}
\end{frame}
\begin{frame}
\todo{}
\begin{itemize}
\item De quel genre de programme on parle~? (Calcul scientifique
---~météo, simulation d'océans, …~---, IA, \ldots)
\item Comment gagner de la perf~?
\item Les 3 bottlenecks
\item Les code analyzers
\end{itemize}
\end{frame}

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slides/20_foundations/main.tex
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\section{Foundations}
\begin{frame}{Bird's eye view of a CPU}
\centering
\includegraphics[height=0.94\textheight]{cpu_big_picture.svg}
\end{frame}
\begin{frame}{Possible bottlenecks}
\begin{columns}
\begin{column}{0.4\textwidth}
\begin{center}
\includegraphics[width=\textwidth]{cpu_big_picture_truncate.svg}
\end{center}
\end{column}
\hfill
\begin{column}{0.58\textwidth}
\begin{tightitemize}{0pt}
\begin{itemize}
\item \alert{Frontend:} \uops{} issued not fast enough;
issuing faster would speed up computation;
\bigskip
\item \alert{Backend:} saturated execution units; adding
more units would speed up computation;
\bigskip
\item \alert{Dependencies:} computation is stalled waiting
for previous results; removing data dependencies would
speed up computation.
\end{itemize}
\end{tightitemize}
\end{column}
\end{columns}
\end{frame}
\begin{frame}{Dependencies and the ROB}
\begin{itemize}
\item Dependencies can stall execution
\item Maybe instructions further down can be executed right now?
\item ROB: circular buffer of \uops{}
\item First possible instruction is issued
\end{itemize}
\end{frame}
\begin{frame}{How do we get insights from this complex system?}
\textbf{Hardware counters}
\begin{itemize}
\item Built-in hardware, counters gathered at runtime
\item Very accurate
\item Available data varies from model to model
\item May not even be available at all
\end{itemize}
\textbf{Simulation?}
\begin{itemize}
\item A modern CPU is \alert{$\sim$\,100e9 transistors}: very complex
models!
\item Very expensive, even for manufacturers for design validation
\item CPU design is industrial secret $\leadsto$ not available anyway
\item \ldots{}\ie{} not feasible.
\end{itemize}
\end{frame}
\begin{frame}{Enter code analyzers}
\begin{itemize}
\item Tools that predict performance of a piece of assembly code on a
given CPU
\item Features microarchitectural models
\item Most often static analyzers
\item May derive further useful metrics, \eg{} bottlenecks, by
inspecting their model at will
\end{itemize}
\end{frame}
\begin{frame}{What can be analyzed?}
Pieces of code referred as \alert{``microkernels''}:
\begin{itemize}
\item body of an (assumed) infinite loop;
\item in steady-state;
\item straight-line code (branches assumed not taken);
\item L1-resident (memory model is out of scope).
\end{itemize}
Reasonable hypotheses for the category of codes worth optimizing this way!
\end{frame}
\begin{frame}{Existing code analyzers}
\begin{itemize}
\item Intel \alert{\iaca{}}: proprietary and only compatible with
Intel. First ``good'' code analyzer, now deprecated. Was (is?)
widely used.
\item \alert{\llvmmca{}}: FOSS, production-grade, many
microarchitectures. Based on data from the \texttt{llvm} compiler.
\item \alert{\uica{}} and \alert{\uopsinfo{}}: research, good accuracy.
Intel.
\item \alert{\ithemal{}}: machine-learning based. Not so accurate.
\item \alert{\gus{}}: instrumentation-based code analyzer (not
static) $\leadsto$ slow. Access to mode information. Made in the
CORSE team.
\end{itemize}
Except Ithemal, \alert{all} are (to some extent) based on manually-made
models!
\end{frame}

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slides/30_frontend/main.tex Normal file
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\section{A frontend model for the Cortex A72}

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slides/40_cesasme/main.tex Normal file
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\section{\cesasme: evaluate and compare state-of-the-art code analyzers}

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slides/50_staticdeps/main.tex Normal file
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\section{\staticdeps: static extraction of memory-carried dependencies}

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slides/60_a72combined/main.tex Normal file
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\section{The \acombined{} model: wrapping it all up}

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