diff --git a/tests/Gia64-test-readonly.c b/tests/Gia64-test-readonly.c
index 408fba5f..25f05061 100644
--- a/tests/Gia64-test-readonly.c
+++ b/tests/Gia64-test-readonly.c
@@ -65,27 +65,9 @@ checker (void)
   if ((ret = unw_set_reg (&c, UNW_IA64_IP, 99)) != -UNW_EREADONLYREG)
     panic ("%s: unw_set_reg (ip) returned %d instead of %d\n",
 	   __FUNCTION__, ret, -UNW_EREADONLYREG);
-  if ((ret = unw_set_reg (&c, UNW_IA64_GR + 5, 99)) != -UNW_EREADONLYREG)
-    panic ("%s: unw_set_reg (r5) returned %d instead of %d\n",
-	   __FUNCTION__, ret, -UNW_EREADONLYREG);
-  if ((ret = unw_set_reg (&c, UNW_IA64_GR + 6, 99)) != -UNW_EREADONLYREG)
-    panic ("%s: unw_set_reg (r6) returned %d instead of %d\n",
-	   __FUNCTION__, ret, -UNW_EREADONLYREG);
   if ((ret = unw_set_reg (&c, UNW_IA64_AR_LC, 99)) != -UNW_EREADONLYREG)
     panic ("%s: unw_set_reg (ar.lc) returned %d instead of %d\n",
 	   __FUNCTION__, ret, -UNW_EREADONLYREG);
-  if ((ret = unw_set_reg (&c, UNW_IA64_BR + 2, 99)) != -UNW_EREADONLYREG)
-    panic ("%s: unw_set_reg (b2) returned %d instead of %d\n",
-	   __FUNCTION__, ret, -UNW_EREADONLYREG);
-  if ((ret = unw_set_reg (&c, UNW_IA64_BR + 3, 99)) != -UNW_EREADONLYREG)
-    panic ("%s: unw_set_reg (b3) returned %d instead of %d\n",
-	   __FUNCTION__, ret, -UNW_EREADONLYREG);
-  if ((ret = unw_set_fpreg (&c, UNW_IA64_FR + 2, fpval)) != -UNW_EREADONLYREG)
-    panic ("%s: unw_set_fpreg (f2) returned %d instead of %d\n",
-	   __FUNCTION__, ret, -UNW_EREADONLYREG);
-  if ((ret = unw_set_fpreg (&c, UNW_IA64_FR + 3, fpval)) != -UNW_EREADONLYREG)
-    panic ("%s: unw_set_fpreg (f3) returned %d instead of %d\n",
-	   __FUNCTION__, ret, -UNW_EREADONLYREG);
 }
 
 int
diff --git a/tests/ia64-test-readonly-asm.S b/tests/ia64-test-readonly-asm.S
index 9be4fb8d..94a4dd74 100644
--- a/tests/ia64-test-readonly-asm.S
+++ b/tests/ia64-test-readonly-asm.S
@@ -34,13 +34,7 @@ test_func:
 	alloc loc0 = ar.pfs, 1, 3, 0, 0
 	mov loc1 = rp
 	.save rp, r0
-	.spillreg r5, f0
-	.spillreg r6, f1
-	.spillreg f2, f0
-	.spillreg f3, f1
 	.save ar.lc, r0
-	.spillreg b2, f0
-	.spillreg b3, f1
 	.body
 	mov loc2 = gp
 	ld8 r2 = [in0], 8;;