diff --git a/src/ia64/init.h b/src/ia64/init.h
index 3eb9a538..1a778fd5 100644
--- a/src/ia64/init.h
+++ b/src/ia64/init.h
@@ -31,44 +31,44 @@ common_init (struct cursor *c)
   unw_word_t bspstore;
   int i, ret;
 
-  c->cfm_loc =		IA64_REG_LOC (c, UNW_IA64_CFM);
-  c->bsp_loc =		IA64_REG_LOC (c, UNW_IA64_AR_BSP);
-  c->bspstore_loc =	IA64_REG_LOC (c, UNW_IA64_AR_BSPSTORE);
-  c->pfs_loc =		IA64_REG_LOC (c, UNW_IA64_AR_PFS);
-  c->rnat_loc =		IA64_REG_LOC (c, UNW_IA64_AR_RNAT);
-  c->ip_loc =		IA64_REG_LOC (c, UNW_IA64_IP);
-  c->pri_unat_loc =	0;	/* no primary UNaT location */
-  c->unat_loc =		IA64_REG_LOC (c, UNW_IA64_AR_UNAT);
-  c->pr_loc =		IA64_REG_LOC (c, UNW_IA64_PR);
-  c->lc_loc =		IA64_REG_LOC (c, UNW_IA64_AR_LC);
-  c->fpsr_loc =		IA64_REG_LOC (c, UNW_IA64_AR_FPSR);
+  c->cfm_loc =			IA64_REG_LOC (c, UNW_IA64_CFM);
+  c->loc[IA64_REG_BSP] =	IA64_REG_LOC (c, UNW_IA64_AR_BSP);
+  c->loc[IA64_REG_BSPSTORE] =	IA64_REG_LOC (c, UNW_IA64_AR_BSPSTORE);
+  c->loc[IA64_REG_PFS] =	IA64_REG_LOC (c, UNW_IA64_AR_PFS);
+  c->loc[IA64_REG_RNAT] =	IA64_REG_LOC (c, UNW_IA64_AR_RNAT);
+  c->loc[IA64_REG_IP] =		IA64_REG_LOC (c, UNW_IA64_IP);
+  c->loc[IA64_REG_PRI_UNAT_MEM] = IA64_NULL_LOC; /* no primary UNaT location */
+  c->loc[IA64_REG_UNAT] =	IA64_REG_LOC (c, UNW_IA64_AR_UNAT);
+  c->loc[IA64_REG_PR] =		IA64_REG_LOC (c, UNW_IA64_PR);
+  c->loc[IA64_REG_LC] =		IA64_REG_LOC (c, UNW_IA64_AR_LC);
+  c->loc[IA64_REG_FPSR] =	IA64_REG_LOC (c, UNW_IA64_AR_FPSR);
 
-  c->r4_loc = IA64_REG_LOC (c, UNW_IA64_GR + 4);
-  c->r5_loc = IA64_REG_LOC (c, UNW_IA64_GR + 5);
-  c->r6_loc = IA64_REG_LOC (c, UNW_IA64_GR + 6);
-  c->r7_loc = IA64_REG_LOC (c, UNW_IA64_GR + 7);
+  c->loc[IA64_REG_R4] = IA64_REG_LOC (c, UNW_IA64_GR + 4);
+  c->loc[IA64_REG_R5] = IA64_REG_LOC (c, UNW_IA64_GR + 5);
+  c->loc[IA64_REG_R6] = IA64_REG_LOC (c, UNW_IA64_GR + 6);
+  c->loc[IA64_REG_R7] = IA64_REG_LOC (c, UNW_IA64_GR + 7);
 
   /* This says that each NaT bit is stored along with the
      corresponding preserved register: */
-  c->nat4_loc = IA64_LOC (4, 0);
-  c->nat5_loc = IA64_LOC (5, 0);
-  c->nat6_loc = IA64_LOC (6, 0);
-  c->nat7_loc = IA64_LOC (7, 0);
+  c->loc[IA64_REG_NAT4] = IA64_LOC_REG (4, 0);
+  c->loc[IA64_REG_NAT5] = IA64_LOC_REG (5, 0);
+  c->loc[IA64_REG_NAT6] = IA64_LOC_REG (6, 0);
+  c->loc[IA64_REG_NAT7] = IA64_LOC_REG (7, 0);
 
-  c->b1_loc = IA64_REG_LOC (c, UNW_IA64_BR + 1);
-  c->b2_loc = IA64_REG_LOC (c, UNW_IA64_BR + 2);
-  c->b3_loc = IA64_REG_LOC (c, UNW_IA64_BR + 3);
-  c->b4_loc = IA64_REG_LOC (c, UNW_IA64_BR + 4);
-  c->b5_loc = IA64_REG_LOC (c, UNW_IA64_BR + 5);
+  c->loc[IA64_REG_B1] = IA64_REG_LOC (c, UNW_IA64_BR + 1);
+  c->loc[IA64_REG_B2] = IA64_REG_LOC (c, UNW_IA64_BR + 2);
+  c->loc[IA64_REG_B3] = IA64_REG_LOC (c, UNW_IA64_BR + 3);
+  c->loc[IA64_REG_B4] = IA64_REG_LOC (c, UNW_IA64_BR + 4);
+  c->loc[IA64_REG_B5] = IA64_REG_LOC (c, UNW_IA64_BR + 5);
 
-  c->f2_loc = IA64_FPREG_LOC (c, UNW_IA64_FR + 2);
-  c->f3_loc = IA64_FPREG_LOC (c, UNW_IA64_FR + 3);
-  c->f4_loc = IA64_FPREG_LOC (c, UNW_IA64_FR + 4);
-  c->f5_loc = IA64_FPREG_LOC (c, UNW_IA64_FR + 5);
-  for (i = 16; i <= 31; ++i)
-    c->fr_loc[i - 16] = IA64_FPREG_LOC (c, UNW_IA64_FR + i);
+  c->loc[IA64_REG_F2] = IA64_FPREG_LOC (c, UNW_IA64_FR + 2);
+  c->loc[IA64_REG_F3] = IA64_FPREG_LOC (c, UNW_IA64_FR + 3);
+  c->loc[IA64_REG_F4] = IA64_FPREG_LOC (c, UNW_IA64_FR + 4);
+  c->loc[IA64_REG_F5] = IA64_FPREG_LOC (c, UNW_IA64_FR + 5);
+  for (i = IA64_REG_F16; i <= IA64_REG_F31; ++i)
+    c->loc[i] = IA64_FPREG_LOC (c, UNW_IA64_FR + 16 + (i - IA64_REG_F16));
 
-  ret = ia64_get (c, c->ip_loc, &c->ip);
+  ret = ia64_get (c, c->loc[IA64_REG_IP], &c->ip);
   if (ret < 0)
     return ret;
 
@@ -76,7 +76,7 @@ common_init (struct cursor *c)
   if (ret < 0)
     return ret;
 
-  ret = ia64_get (c, c->pr_loc, &c->pr);
+  ret = ia64_get (c, c->loc[IA64_REG_PR], &c->pr);
   if (ret < 0)
     return ret;
 
@@ -86,30 +86,32 @@ common_init (struct cursor *c)
 
   c->psp = c->sp;
 
-  ret = ia64_get (c, c->bsp_loc, &c->bsp);
+  ret = ia64_get (c, c->loc[IA64_REG_BSP], &c->bsp);
   if (ret < 0)
     return ret;
 
-  ret = ia64_get (c, c->bspstore_loc, &bspstore);
+  ret = ia64_get (c, c->loc[IA64_REG_BSPSTORE], &bspstore);
   if (ret < 0)
     return ret;
 
   c->rbs_curr = c->rbs_left_edge = 0;
 
   /* There is no way to know the real size of the most recent
-     (right-most) RBS so we'll just assume it to occupy half the
-     address space.  That allows us to have a notion of "above" and
-     "below" even with the wrap-around nature of addressing.  */
+     (right-most) RBS so we'll just assume it to occupy a quarter of
+     the address space (so we have a notion of "above" and "below" and
+     one bit to indicate whether the backing store needs to be
+     accessed via uc_access(3)).  */
   c->rbs_area[0].end = bspstore;
   c->rbs_area[0].size = ((unw_word_t) 1) << 63;	/* initial guess... */
   c->rbs_area[0].rnat_loc = IA64_REG_LOC (c, UNW_IA64_AR_RNAT);
-  debug (10, "%s: initial rbs-area: [?-0x%lx), rnat@0x%lx\n", __FUNCTION__,
-	 (long) c->rbs_area[0].end, (long) c->rbs_area[0].rnat_loc);
+  debug (10, "%s: initial rbs-area: [?-0x%llx), rnat@%s\n", __FUNCTION__,
+	 (long long) c->rbs_area[0].end,
+	 ia64_strloc (c->rbs_area[0].rnat_loc));
 
   c->pi.flags = 0;
 
-  c->sigcontext_loc = 0;
-  c->is_signal_frame = 0;
+  c->sigcontext_addr = 0;
+  c->abi_marker = 0;
 
   c->hint = 0;
   c->prev_script = 0;