From 1acfcc74e501b8b7d167a49eb70d0f0b5eb9d0e6 Mon Sep 17 00:00:00 2001 From: "hp.com!davidm" Date: Sat, 29 Mar 2003 07:32:50 +0000 Subject: [PATCH] (_UPT_reg_offset): Add definitions for x86. (Logical change 1.71) --- src/_UPT_reg_offset.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/src/_UPT_reg_offset.c b/src/_UPT_reg_offset.c index 5b52443d..d666c4cd 100644 --- a/src/_UPT_reg_offset.c +++ b/src/_UPT_reg_offset.c @@ -214,6 +214,24 @@ int _UPT_reg_offset[UNW_REG_LAST] = [UNW_IA64_IP] = PT_CR_IIP #elif defined(HAVE_TTRACE) # warning No support for ttrace() yet. +#elif defined(UNW_TARGET_X86) + [UNW_X86_EAX] = 0x18, + [UNW_X86_EBX] = 0x00, + [UNW_X86_ECX] = 0x04, + [UNW_X86_EDX] = 0x08, + [UNW_X86_ESI] = 0x0c, + [UNW_X86_EDI] = 0x10, + [UNW_X86_EBP] = 0x14, + [UNW_X86_EIP] = 0x30, + [UNW_X86_ESP] = 0x3c +/* CS = 0x34, */ +/* DS = 0x1c, */ +/* ES = 0x20, */ +/* FS = 0x24, */ +/* GS = 0x28, */ +/* ORIG_EAX = 0x2c, */ +/* EFLAGS = 0x38, */ +/* SS = 0x40 */ #else # error Fix me. #endif